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Commit b7c80600 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Extract skl_universal_plane_init() 



There's not much point in following the primary vs. sprite split
for the SKL+ universal plane init code. The only difference is
of our own doing in the form of the .check_plane(). Let's make
a small exception for that little detail and otherwise share
the same code to initialize all the universal planes.

Eventually we should eliminate the mess around .check_plane()
as well, but for now let's be happy with some code reduction.

v2: Remember to set up plane->has_fbc
    Make skl_plane_has_ccs() static
v3: Rebase due to NV12, rename some variables
v4: Don't leave the color_encoding/range props behind
v5: Rebase dur to blend properties, skl_plane_max_stride() and
    skl_plane_check()
v6: Make skl_update_plane() static

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> #v4
Link: https://patchwork.freedesktop.org/patch/msgid/20181005125817.22576-10-ville.syrjala@linux.intel.com
parent c539b579

drivers/gpu/drm/i915/intel_display.c

+8 −208
Original line number Diff line number Diff line
@@ -74,55 +74,6 @@ static const uint64_t i9xx_format_modifiers[] = { 
	DRM_FORMAT_MOD_INVALID

};



static const uint32_t skl_primary_formats[] = {

	DRM_FORMAT_C8,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XRGB2101010,

	DRM_FORMAT_XBGR2101010,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YVYU,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_VYUY,

};



static const uint32_t skl_pri_planar_formats[] = {

	DRM_FORMAT_C8,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XRGB2101010,

	DRM_FORMAT_XBGR2101010,

	DRM_FORMAT_YUYV,

	DRM_FORMAT_YVYU,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_VYUY,

	DRM_FORMAT_NV12,

};



static const uint64_t skl_format_modifiers_noccs[] = {

	I915_FORMAT_MOD_Yf_TILED,

	I915_FORMAT_MOD_Y_TILED,

	I915_FORMAT_MOD_X_TILED,

	DRM_FORMAT_MOD_LINEAR,

	DRM_FORMAT_MOD_INVALID

};



static const uint64_t skl_format_modifiers_ccs[] = {

	I915_FORMAT_MOD_Yf_TILED_CCS,

	I915_FORMAT_MOD_Y_TILED_CCS,

	I915_FORMAT_MOD_Yf_TILED,

	I915_FORMAT_MOD_Y_TILED,

	I915_FORMAT_MOD_X_TILED,

	DRM_FORMAT_MOD_LINEAR,

	DRM_FORMAT_MOD_INVALID

};



/* Cursor formats */

static const uint32_t intel_cursor_formats[] = {

	DRM_FORMAT_ARGB8888,
@@ -13473,56 +13424,6 @@ static bool i965_plane_format_mod_supported(struct drm_plane *_plane, 
	}

}



static bool skl_plane_format_mod_supported(struct drm_plane *_plane,

					   u32 format, u64 modifier)

{

	struct intel_plane *plane = to_intel_plane(_plane);



	switch (modifier) {

	case DRM_FORMAT_MOD_LINEAR:

	case I915_FORMAT_MOD_X_TILED:

	case I915_FORMAT_MOD_Y_TILED:

	case I915_FORMAT_MOD_Yf_TILED:

		break;

	case I915_FORMAT_MOD_Y_TILED_CCS:

	case I915_FORMAT_MOD_Yf_TILED_CCS:

		if (!plane->has_ccs)

			return false;

		break;

	default:

		return false;

	}



	switch (format) {

	case DRM_FORMAT_XRGB8888:

	case DRM_FORMAT_XBGR8888:

	case DRM_FORMAT_ARGB8888:

	case DRM_FORMAT_ABGR8888:

		if (is_ccs_modifier(modifier))

			return true;

		/* fall through */

	case DRM_FORMAT_RGB565:

	case DRM_FORMAT_XRGB2101010:

	case DRM_FORMAT_XBGR2101010:

	case DRM_FORMAT_YUYV:

	case DRM_FORMAT_YVYU:

	case DRM_FORMAT_UYVY:

	case DRM_FORMAT_VYUY:

	case DRM_FORMAT_NV12:

		if (modifier == I915_FORMAT_MOD_Yf_TILED)

			return true;

		/* fall through */

	case DRM_FORMAT_C8:

		if (modifier == DRM_FORMAT_MOD_LINEAR ||

		    modifier == I915_FORMAT_MOD_X_TILED ||

		    modifier == I915_FORMAT_MOD_Y_TILED)

			return true;

		/* fall through */

	default:

		return false;

	}

}



static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,

					      u32 format, u64 modifier)

{
@@ -13530,17 +13431,6 @@ static bool intel_cursor_format_mod_supported(struct drm_plane *_plane, 
		format == DRM_FORMAT_ARGB8888;

}



static const struct drm_plane_funcs skl_plane_funcs = {

	.update_plane = drm_atomic_helper_update_plane,

	.disable_plane = drm_atomic_helper_disable_plane,

	.destroy = intel_plane_destroy,

	.atomic_get_property = intel_plane_atomic_get_property,

	.atomic_set_property = intel_plane_atomic_set_property,

	.atomic_duplicate_state = intel_plane_duplicate_state,

	.atomic_destroy_state = intel_plane_destroy_state,

	.format_mod_supported = skl_plane_format_mod_supported,

};



static const struct drm_plane_funcs i965_plane_funcs = {

	.update_plane = drm_atomic_helper_update_plane,

	.disable_plane = drm_atomic_helper_disable_plane,
@@ -13725,37 +13615,6 @@ static bool i9xx_plane_has_fbc(struct drm_i915_private *dev_priv, 
		return i9xx_plane == PLANE_A;

}



static bool skl_plane_has_fbc(struct drm_i915_private *dev_priv,

			      enum pipe pipe, enum plane_id plane_id)

{

	if (!HAS_FBC(dev_priv))

		return false;



	return pipe == PIPE_A && plane_id == PLANE_PRIMARY;

}



bool skl_plane_has_planar(struct drm_i915_private *dev_priv,

			  enum pipe pipe, enum plane_id plane_id)

{

	/*

	 * FIXME: ICL requires two hardware planes for scanning out NV12

	 * framebuffers. Do not advertize support until this is implemented.

	 */

	if (INTEL_GEN(dev_priv) >= 11)

		return false;



	if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))

		return false;



	if (INTEL_GEN(dev_priv) == 9 && !IS_GEMINILAKE(dev_priv) && pipe == PIPE_C)

		return false;



	if (plane_id != PLANE_PRIMARY && plane_id != PLANE_SPRITE0)

		return false;



	return true;

}



static struct intel_plane *

intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)

{
@@ -13768,6 +13627,10 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) 
	const uint64_t *modifiers;

	int ret;



	if (INTEL_GEN(dev_priv) >= 9)

		return skl_universal_plane_create(dev_priv, pipe,

						  PLANE_PRIMARY);



	primary = intel_plane_alloc();

	if (IS_ERR(primary))

		return primary;
@@ -13784,45 +13647,14 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) 
	primary->id = PLANE_PRIMARY;

	primary->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, primary->id);



	if (INTEL_GEN(dev_priv) >= 9)

		primary->has_fbc = skl_plane_has_fbc(dev_priv,

						     primary->pipe,

						     primary->id);

	else

		primary->has_fbc = i9xx_plane_has_fbc(dev_priv,

						      primary->i9xx_plane);



	primary->has_fbc = i9xx_plane_has_fbc(dev_priv, primary->i9xx_plane);

	if (primary->has_fbc) {

		struct intel_fbc *fbc = &dev_priv->fbc;



		fbc->possible_framebuffer_bits |= primary->frontbuffer_bit;

	}



	if (INTEL_GEN(dev_priv) >= 9) {

		primary->has_ccs = skl_plane_has_ccs(dev_priv, pipe,

						     PLANE_PRIMARY);



		if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) {

			intel_primary_formats = skl_pri_planar_formats;

			num_formats = ARRAY_SIZE(skl_pri_planar_formats);

		} else {

			intel_primary_formats = skl_primary_formats;

			num_formats = ARRAY_SIZE(skl_primary_formats);

		}



		if (primary->has_ccs)

			modifiers = skl_format_modifiers_ccs;

		else

			modifiers = skl_format_modifiers_noccs;



		primary->max_stride = skl_plane_max_stride;

		primary->update_plane = skl_update_plane;

		primary->disable_plane = skl_disable_plane;

		primary->get_hw_state = skl_plane_get_hw_state;

		primary->check_plane = skl_plane_check;



		plane_funcs = &skl_plane_funcs;

	} else if (INTEL_GEN(dev_priv) >= 4) {

	if (INTEL_GEN(dev_priv) >= 4) {

		intel_primary_formats = i965_primary_formats;

		num_formats = ARRAY_SIZE(i965_primary_formats);

		modifiers = i9xx_format_modifiers;
@@ -13850,14 +13682,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) 


	possible_crtcs = BIT(pipe);



	if (INTEL_GEN(dev_priv) >= 9)

		ret = drm_universal_plane_init(&dev_priv->drm, &primary->base,

					       possible_crtcs, plane_funcs,

					       intel_primary_formats, num_formats,

					       modifiers,

					       DRM_PLANE_TYPE_PRIMARY,

					       "plane 1%c", pipe_name(pipe));

	else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))

	if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))

		ret = drm_universal_plane_init(&dev_priv->drm, &primary->base,

					       possible_crtcs, plane_funcs,

					       intel_primary_formats, num_formats,
@@ -13875,16 +13700,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) 
	if (ret)

		goto fail;



	if (INTEL_GEN(dev_priv) >= 10) {

		supported_rotations =

			DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |

			DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270 |

			DRM_MODE_REFLECT_X;

	} else if (INTEL_GEN(dev_priv) >= 9) {

		supported_rotations =

			DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |

			DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270;

	} else if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {

	if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {

		supported_rotations =

			DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180 |

			DRM_MODE_REFLECT_X;
@@ -13900,22 +13716,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) 
						   DRM_MODE_ROTATE_0,

						   supported_rotations);



	if (INTEL_GEN(dev_priv) >= 9) {

		drm_plane_create_color_properties(&primary->base,

						  BIT(DRM_COLOR_YCBCR_BT601) |

						  BIT(DRM_COLOR_YCBCR_BT709),

						  BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |

						  BIT(DRM_COLOR_YCBCR_FULL_RANGE),

						  DRM_COLOR_YCBCR_BT709,

						  DRM_COLOR_YCBCR_LIMITED_RANGE);



		drm_plane_create_alpha_property(&primary->base);

		drm_plane_create_blend_mode_property(&primary->base,

						     BIT(DRM_MODE_BLEND_PIXEL_NONE) |

						     BIT(DRM_MODE_BLEND_PREMULTI) |

						     BIT(DRM_MODE_BLEND_COVERAGE));

	}



	drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs);



	return primary;

drivers/gpu/drm/i915/intel_drv.h

+3 −14
Original line number Diff line number Diff line
@@ -2124,25 +2124,14 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data, 
				    struct drm_file *file_priv);

void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state);

void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state);

void skl_update_plane(struct intel_plane *plane,

		      const struct intel_crtc_state *crtc_state,

		      const struct intel_plane_state *plane_state);

void skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc);

bool skl_plane_get_hw_state(struct intel_plane *plane, enum pipe *pipe);

bool skl_plane_has_ccs(struct drm_i915_private *dev_priv,

		       enum pipe pipe, enum plane_id plane_id);

bool skl_plane_has_planar(struct drm_i915_private *dev_priv,

			  enum pipe pipe, enum plane_id plane_id);

unsigned int skl_plane_max_stride(struct intel_plane *plane,

				  u32 pixel_format, u64 modifier,

				  unsigned int rotation);

int skl_plane_check(struct intel_crtc_state *crtc_state,

		    struct intel_plane_state *plane_state);

int intel_plane_check_stride(const struct intel_plane_state *plane_state);

int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);

int chv_plane_check_rotation(const struct intel_plane_state *plane_state);

struct intel_plane *intel_plane_alloc(void);

void intel_plane_free(struct intel_plane *plane);

struct intel_plane *

skl_universal_plane_create(struct drm_i915_private *dev_priv,

			   enum pipe pipe, enum plane_id plane_id);



/* intel_tv.c */

void intel_tv_init(struct drm_i915_private *dev_priv);

drivers/gpu/drm/i915/intel_sprite.c

+150 −67
Original line number Diff line number Diff line
@@ -292,7 +292,7 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state) 
	return 0;

}



unsigned int

static unsigned int

skl_plane_max_stride(struct intel_plane *plane,

		     u32 pixel_format, u64 modifier,

		     unsigned int rotation)
@@ -360,7 +360,7 @@ skl_program_scaler(struct drm_i915_private *dev_priv, 
		      ((crtc_w + 1) << 16)|(crtc_h + 1));

}



void

static void

skl_update_plane(struct intel_plane *plane,

		 const struct intel_crtc_state *crtc_state,

		 const struct intel_plane_state *plane_state)
@@ -433,7 +433,7 @@ skl_update_plane(struct intel_plane *plane, 
	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}



void

static void

skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)

{

	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
@@ -451,7 +451,7 @@ skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) 
	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}



bool

static bool

skl_plane_get_hw_state(struct intel_plane *plane,

		       enum pipe *pipe)

{
@@ -1342,7 +1342,7 @@ static int skl_plane_check_dst_coordinates(const struct intel_crtc_state *crtc_s 
	return 0;

}



int skl_plane_check(struct intel_crtc_state *crtc_state,

static int skl_plane_check(struct intel_crtc_state *crtc_state,

			   struct intel_plane_state *plane_state)

{

	struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
@@ -1776,7 +1776,38 @@ static const struct drm_plane_funcs skl_plane_funcs = { 
	.format_mod_supported = skl_plane_format_mod_supported,

};



bool skl_plane_has_ccs(struct drm_i915_private *dev_priv,

static bool skl_plane_has_fbc(struct drm_i915_private *dev_priv,

			      enum pipe pipe, enum plane_id plane_id)

{

	if (!HAS_FBC(dev_priv))

		return false;



	return pipe == PIPE_A && plane_id == PLANE_PRIMARY;

}



static bool skl_plane_has_planar(struct drm_i915_private *dev_priv,

				 enum pipe pipe, enum plane_id plane_id)

{

	/*

	 * FIXME: ICL requires two hardware planes for scanning out NV12

	 * framebuffers. Do not advertize support until this is implemented.

	 */

	if (INTEL_GEN(dev_priv) >= 11)

		return false;



	if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))

		return false;



	if (INTEL_GEN(dev_priv) == 9 && !IS_GEMINILAKE(dev_priv) && pipe == PIPE_C)

		return false;



	if (plane_id != PLANE_PRIMARY && plane_id != PLANE_SPRITE0)

		return false;



	return true;

}



static bool skl_plane_has_ccs(struct drm_i915_private *dev_priv,

			      enum pipe pipe, enum plane_id plane_id)

{

	if (plane_id == PLANE_CURSOR)
@@ -1822,6 +1853,105 @@ void intel_plane_free(struct intel_plane *plane) 
	kfree(plane);

}



struct intel_plane *

skl_universal_plane_create(struct drm_i915_private *dev_priv,

			   enum pipe pipe, enum plane_id plane_id)

{

	struct intel_plane *plane;

	enum drm_plane_type plane_type;

	unsigned int supported_rotations;

	unsigned int possible_crtcs;

	const u64 *modifiers;

	const u32 *formats;

	int num_formats;

	int ret;



	plane = intel_plane_alloc();

	if (IS_ERR(plane))

		return plane;



	plane->pipe = pipe;

	plane->id = plane_id;

	plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id);



	plane->has_fbc = skl_plane_has_fbc(dev_priv, pipe, plane_id);

	if (plane->has_fbc) {

		struct intel_fbc *fbc = &dev_priv->fbc;



		fbc->possible_framebuffer_bits |= plane->frontbuffer_bit;

	}



	plane->max_stride = skl_plane_max_stride;

	plane->update_plane = skl_update_plane;

	plane->disable_plane = skl_disable_plane;

	plane->get_hw_state = skl_plane_get_hw_state;

	plane->check_plane = skl_plane_check;



	if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {

		formats = skl_planar_formats;

		num_formats = ARRAY_SIZE(skl_planar_formats);

	} else {

		formats = skl_plane_formats;

		num_formats = ARRAY_SIZE(skl_plane_formats);

	}



	plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe, plane_id);

	if (plane->has_ccs)

		modifiers = skl_plane_format_modifiers_ccs;

	else

		modifiers = skl_plane_format_modifiers_noccs;



	if (plane_id == PLANE_PRIMARY)

		plane_type = DRM_PLANE_TYPE_PRIMARY;

	else

		plane_type = DRM_PLANE_TYPE_OVERLAY;



	possible_crtcs = BIT(pipe);



	ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,

				       possible_crtcs, &skl_plane_funcs,

				       formats, num_formats, modifiers,

				       plane_type,

				       "plane %d%c", plane_id + 1,

				       pipe_name(pipe));

	if (ret)

		goto fail;



	supported_rotations =

		DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |

		DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270;



	if (INTEL_GEN(dev_priv) >= 10)

		supported_rotations |= DRM_MODE_REFLECT_X;



	drm_plane_create_rotation_property(&plane->base,

					   DRM_MODE_ROTATE_0,

					   supported_rotations);



	drm_plane_create_color_properties(&plane->base,

					  BIT(DRM_COLOR_YCBCR_BT601) |

					  BIT(DRM_COLOR_YCBCR_BT709),

					  BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |

					  BIT(DRM_COLOR_YCBCR_FULL_RANGE),

					  DRM_COLOR_YCBCR_BT709,

					  DRM_COLOR_YCBCR_LIMITED_RANGE);



	drm_plane_create_alpha_property(&plane->base);

	drm_plane_create_blend_mode_property(&plane->base,

					     BIT(DRM_MODE_BLEND_PIXEL_NONE) |

					     BIT(DRM_MODE_BLEND_PREMULTI) |

					     BIT(DRM_MODE_BLEND_COVERAGE));



	drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);



	return plane;



fail:

	intel_plane_free(plane);



	return ERR_PTR(ret);

}



struct intel_plane *

intel_sprite_plane_create(struct drm_i915_private *dev_priv,

			  enum pipe pipe, int plane)
@@ -1835,36 +1965,15 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, 
	int num_plane_formats;

	int ret;



	if (INTEL_GEN(dev_priv) >= 9)

		return skl_universal_plane_create(dev_priv, pipe,

						  PLANE_SPRITE0 + plane);



	intel_plane = intel_plane_alloc();

	if (IS_ERR(intel_plane))

		return intel_plane;



	if (INTEL_GEN(dev_priv) >= 9) {

		intel_plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe,

							 PLANE_SPRITE0 + plane);



		intel_plane->max_stride = skl_plane_max_stride;

		intel_plane->update_plane = skl_update_plane;

		intel_plane->disable_plane = skl_disable_plane;

		intel_plane->get_hw_state = skl_plane_get_hw_state;

		intel_plane->check_plane = skl_plane_check;



		if (skl_plane_has_planar(dev_priv, pipe,

					 PLANE_SPRITE0 + plane)) {

			plane_formats = skl_planar_formats;

			num_plane_formats = ARRAY_SIZE(skl_planar_formats);

		} else {

			plane_formats = skl_plane_formats;

			num_plane_formats = ARRAY_SIZE(skl_plane_formats);

		}



		if (intel_plane->has_ccs)

			modifiers = skl_plane_format_modifiers_ccs;

		else

			modifiers = skl_plane_format_modifiers_noccs;



		plane_funcs = &skl_plane_funcs;

	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {

	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {

		intel_plane->max_stride = i9xx_plane_max_stride;

		intel_plane->update_plane = vlv_update_plane;

		intel_plane->disable_plane = vlv_disable_plane;
@@ -1909,16 +2018,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, 
		}

	}



	if (INTEL_GEN(dev_priv) >= 10) {

		supported_rotations =

			DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |

			DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270 |

			DRM_MODE_REFLECT_X;

	} else if (INTEL_GEN(dev_priv) >= 9) {

		supported_rotations =

			DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |

			DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270;

	} else if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {

	if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {

		supported_rotations =

			DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180 |

			DRM_MODE_REFLECT_X;
@@ -1933,14 +2033,6 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, 


	possible_crtcs = BIT(pipe);



	if (INTEL_GEN(dev_priv) >= 9)

		ret = drm_universal_plane_init(&dev_priv->drm, &intel_plane->base,

					       possible_crtcs, plane_funcs,

					       plane_formats, num_plane_formats,

					       modifiers,

					       DRM_PLANE_TYPE_OVERLAY,

					       "plane %d%c", plane + 2, pipe_name(pipe));

	else

	ret = drm_universal_plane_init(&dev_priv->drm, &intel_plane->base,

				       possible_crtcs, plane_funcs,

				       plane_formats, num_plane_formats,
@@ -1962,15 +2054,6 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, 
					  DRM_COLOR_YCBCR_BT709,

					  DRM_COLOR_YCBCR_LIMITED_RANGE);



	if (INTEL_GEN(dev_priv) >= 9) {

		drm_plane_create_alpha_property(&intel_plane->base);



		drm_plane_create_blend_mode_property(&intel_plane->base,

						     BIT(DRM_MODE_BLEND_PIXEL_NONE) |

						     BIT(DRM_MODE_BLEND_PREMULTI) |

						     BIT(DRM_MODE_BLEND_COVERAGE));

	}



	drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);



	return intel_plane;