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Unverified Commit b7169dde authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Mark Brown
Browse files

ASoC: rsnd: remove RSND_REG_ from rsnd_reg 



Current rsnd is using RSND_REG_xxx for register naming,
and using RSND_REG_##f style macro for read/write.
The biggest reason why it uses this style is that
we can avoid non-existing register access.
But, its demerit is sequential register access code will
be very ugly.
Current rsnd driver is well tested, so, let's remove RSND_REG_
from rsnd_reg, and cleanup sequential register access code.

Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: default avatarHiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 0a26d6df

sound/soc/sh/rcar/adg.c

+3 −33
Original line number Diff line number Diff line
@@ -249,28 +249,8 @@ int rsnd_adg_set_src_timesel_gen2(struct rsnd_mod *src_mod, 
	out  = out	<< shift;

	mask = 0x0f1f	<< shift;



	switch (id / 2) {

	case 0:

		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL0,  mask, in);

		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL0, mask, out);

		break;

	case 1:

		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL1,  mask, in);

		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL1, mask, out);

		break;

	case 2:

		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL2,  mask, in);

		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL2, mask, out);

		break;

	case 3:

		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL3,  mask, in);

		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL3, mask, out);

		break;

	case 4:

		rsnd_mod_bset(adg_mod, SRCIN_TIMSEL4,  mask, in);

		rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL4, mask, out);

		break;

	}

	rsnd_mod_bset(adg_mod, SRCIN_TIMSEL(id / 2),  mask, in);

	rsnd_mod_bset(adg_mod, SRCOUT_TIMSEL(id / 2), mask, out);



	if (en)

		rsnd_mod_bset(adg_mod, DIV_EN, en, en);
@@ -299,17 +279,7 @@ static void rsnd_adg_set_ssi_clk(struct rsnd_mod *ssi_mod, u32 val) 
	if (id == 8)

		return;



	switch (id / 4) {

	case 0:

		rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL0, mask, val);

		break;

	case 1:

		rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL1, mask, val);

		break;

	case 2:

		rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL2, mask, val);

		break;

	}

	rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL(id / 4), mask, val);



	dev_dbg(dev, "AUDIO_CLK_SEL is 0x%x\n", val);

}

sound/soc/sh/rcar/ctu.c

+17 −52
Original line number Diff line number Diff line
@@ -72,10 +72,7 @@ 
struct rsnd_ctu {

	struct rsnd_mod mod;

	struct rsnd_kctrl_cfg_m pass;

	struct rsnd_kctrl_cfg_m sv0;

	struct rsnd_kctrl_cfg_m sv1;

	struct rsnd_kctrl_cfg_m sv2;

	struct rsnd_kctrl_cfg_m sv3;

	struct rsnd_kctrl_cfg_m sv[4];

	struct rsnd_kctrl_cfg_s reset;

	int channels;

	u32 flags;
@@ -120,7 +117,7 @@ static void rsnd_ctu_value_init(struct rsnd_dai_stream *io, 
	struct rsnd_ctu *ctu = rsnd_mod_to_ctu(mod);

	u32 cpmdr = 0;

	u32 scmdr = 0;

	int i;

	int i, j;



	for (i = 0; i < RSND_MAX_CHANNELS; i++) {

		u32 val = rsnd_kctrl_valm(ctu->pass, i);
@@ -139,45 +136,13 @@ static void rsnd_ctu_value_init(struct rsnd_dai_stream *io, 


	rsnd_mod_write(mod, CTU_SCMDR, scmdr);



	if (scmdr > 0) {

		rsnd_mod_write(mod, CTU_SV00R, rsnd_kctrl_valm(ctu->sv0, 0));

		rsnd_mod_write(mod, CTU_SV01R, rsnd_kctrl_valm(ctu->sv0, 1));

		rsnd_mod_write(mod, CTU_SV02R, rsnd_kctrl_valm(ctu->sv0, 2));

		rsnd_mod_write(mod, CTU_SV03R, rsnd_kctrl_valm(ctu->sv0, 3));

		rsnd_mod_write(mod, CTU_SV04R, rsnd_kctrl_valm(ctu->sv0, 4));

		rsnd_mod_write(mod, CTU_SV05R, rsnd_kctrl_valm(ctu->sv0, 5));

		rsnd_mod_write(mod, CTU_SV06R, rsnd_kctrl_valm(ctu->sv0, 6));

		rsnd_mod_write(mod, CTU_SV07R, rsnd_kctrl_valm(ctu->sv0, 7));

	}

	if (scmdr > 1) {

		rsnd_mod_write(mod, CTU_SV10R, rsnd_kctrl_valm(ctu->sv1, 0));

		rsnd_mod_write(mod, CTU_SV11R, rsnd_kctrl_valm(ctu->sv1, 1));

		rsnd_mod_write(mod, CTU_SV12R, rsnd_kctrl_valm(ctu->sv1, 2));

		rsnd_mod_write(mod, CTU_SV13R, rsnd_kctrl_valm(ctu->sv1, 3));

		rsnd_mod_write(mod, CTU_SV14R, rsnd_kctrl_valm(ctu->sv1, 4));

		rsnd_mod_write(mod, CTU_SV15R, rsnd_kctrl_valm(ctu->sv1, 5));

		rsnd_mod_write(mod, CTU_SV16R, rsnd_kctrl_valm(ctu->sv1, 6));

		rsnd_mod_write(mod, CTU_SV17R, rsnd_kctrl_valm(ctu->sv1, 7));

	}

	if (scmdr > 2) {

		rsnd_mod_write(mod, CTU_SV20R, rsnd_kctrl_valm(ctu->sv2, 0));

		rsnd_mod_write(mod, CTU_SV21R, rsnd_kctrl_valm(ctu->sv2, 1));

		rsnd_mod_write(mod, CTU_SV22R, rsnd_kctrl_valm(ctu->sv2, 2));

		rsnd_mod_write(mod, CTU_SV23R, rsnd_kctrl_valm(ctu->sv2, 3));

		rsnd_mod_write(mod, CTU_SV24R, rsnd_kctrl_valm(ctu->sv2, 4));

		rsnd_mod_write(mod, CTU_SV25R, rsnd_kctrl_valm(ctu->sv2, 5));

		rsnd_mod_write(mod, CTU_SV26R, rsnd_kctrl_valm(ctu->sv2, 6));

		rsnd_mod_write(mod, CTU_SV27R, rsnd_kctrl_valm(ctu->sv2, 7));

	}

	if (scmdr > 3) {

		rsnd_mod_write(mod, CTU_SV30R, rsnd_kctrl_valm(ctu->sv3, 0));

		rsnd_mod_write(mod, CTU_SV31R, rsnd_kctrl_valm(ctu->sv3, 1));

		rsnd_mod_write(mod, CTU_SV32R, rsnd_kctrl_valm(ctu->sv3, 2));

		rsnd_mod_write(mod, CTU_SV33R, rsnd_kctrl_valm(ctu->sv3, 3));

		rsnd_mod_write(mod, CTU_SV34R, rsnd_kctrl_valm(ctu->sv3, 4));

		rsnd_mod_write(mod, CTU_SV35R, rsnd_kctrl_valm(ctu->sv3, 5));

		rsnd_mod_write(mod, CTU_SV36R, rsnd_kctrl_valm(ctu->sv3, 6));

		rsnd_mod_write(mod, CTU_SV37R, rsnd_kctrl_valm(ctu->sv3, 7));

	for (i = 0; i < 4; i++) {



		if (i >= scmdr)

			break;



		for (j = 0; j < RSND_MAX_CHANNELS; j++)

			rsnd_mod_write(mod, CTU_SVxxR(i, j), rsnd_kctrl_valm(ctu->sv[i], j));

	}



	rsnd_mod_write(mod, CTU_CTUIR, 0);
@@ -194,10 +159,10 @@ static void rsnd_ctu_value_reset(struct rsnd_dai_stream *io, 


	for (i = 0; i < RSND_MAX_CHANNELS; i++) {

		rsnd_kctrl_valm(ctu->pass, i) = 0;

		rsnd_kctrl_valm(ctu->sv0,  i) = 0;

		rsnd_kctrl_valm(ctu->sv1,  i) = 0;

		rsnd_kctrl_valm(ctu->sv2,  i) = 0;

		rsnd_kctrl_valm(ctu->sv3,  i) = 0;

		rsnd_kctrl_valm(ctu->sv[0],  i) = 0;

		rsnd_kctrl_valm(ctu->sv[1],  i) = 0;

		rsnd_kctrl_valm(ctu->sv[2],  i) = 0;

		rsnd_kctrl_valm(ctu->sv[3],  i) = 0;

	}

	rsnd_kctrl_vals(ctu->reset) = 0;

}
@@ -247,7 +212,7 @@ static int rsnd_ctu_pcm_new(struct rsnd_mod *mod, 
	ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU SV0",

			       rsnd_kctrl_accept_anytime,

			       NULL,

			       &ctu->sv0, RSND_MAX_CHANNELS,

			       &ctu->sv[0], RSND_MAX_CHANNELS,

			       0x00FFFFFF);

	if (ret < 0)

		return ret;
@@ -256,7 +221,7 @@ static int rsnd_ctu_pcm_new(struct rsnd_mod *mod, 
	ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU SV1",

			       rsnd_kctrl_accept_anytime,

			       NULL,

			       &ctu->sv1, RSND_MAX_CHANNELS,

			       &ctu->sv[1], RSND_MAX_CHANNELS,

			       0x00FFFFFF);

	if (ret < 0)

		return ret;
@@ -265,7 +230,7 @@ static int rsnd_ctu_pcm_new(struct rsnd_mod *mod, 
	ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU SV2",

			       rsnd_kctrl_accept_anytime,

			       NULL,

			       &ctu->sv2, RSND_MAX_CHANNELS,

			       &ctu->sv[2], RSND_MAX_CHANNELS,

			       0x00FFFFFF);

	if (ret < 0)

		return ret;
@@ -274,7 +239,7 @@ static int rsnd_ctu_pcm_new(struct rsnd_mod *mod, 
	ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU SV3",

			       rsnd_kctrl_accept_anytime,

			       NULL,

			       &ctu->sv3, RSND_MAX_CHANNELS,

			       &ctu->sv[3], RSND_MAX_CHANNELS,

			       0x00FFFFFF);

	if (ret < 0)

		return ret;

sound/soc/sh/rcar/dvc.c

+2 −8
Original line number Diff line number Diff line
@@ -89,14 +89,8 @@ static void rsnd_dvc_volume_parameter(struct rsnd_dai_stream *io, 
			val[i] = rsnd_kctrl_valm(dvc->volume, i);



	/* Enable Digital Volume */

	rsnd_mod_write(mod, DVC_VOL0R, val[0]);

	rsnd_mod_write(mod, DVC_VOL1R, val[1]);

	rsnd_mod_write(mod, DVC_VOL2R, val[2]);

	rsnd_mod_write(mod, DVC_VOL3R, val[3]);

	rsnd_mod_write(mod, DVC_VOL4R, val[4]);

	rsnd_mod_write(mod, DVC_VOL5R, val[5]);

	rsnd_mod_write(mod, DVC_VOL6R, val[6]);

	rsnd_mod_write(mod, DVC_VOL7R, val[7]);

	for (i = 0; i < RSND_MAX_CHANNELS; i++)

		rsnd_mod_write(mod, DVC_VOLxR(i), val[i]);

}



static void rsnd_dvc_volume_init(struct rsnd_dai_stream *io,

sound/soc/sh/rcar/gen.c

+12 −11
Original line number Diff line number Diff line
@@ -26,8 +26,8 @@ struct rsnd_gen { 
	struct regmap *regmap[RSND_BASE_MAX];



	/* RSND_REG_MAX base */

	struct regmap_field *regs[RSND_REG_MAX];

	const char *reg_name[RSND_REG_MAX];

	struct regmap_field *regs[REG_MAX];

	const char *reg_name[REG_MAX];

};



#define rsnd_priv_to_gen(p)	((struct rsnd_gen *)(p)->gen)
@@ -49,11 +49,11 @@ struct rsnd_regmap_field_conf { 
}

/* single address mapping */

#define RSND_GEN_S_REG(id, offset)	\

	RSND_REG_SET(RSND_REG_##id, offset, 0, #id)

	RSND_REG_SET(id, offset, 0, #id)



/* multi address mapping */

#define RSND_GEN_M_REG(id, offset, _id_offset)	\

	RSND_REG_SET(RSND_REG_##id, offset, _id_offset, #id)

	RSND_REG_SET(id, offset, _id_offset, #id)



/*

 *		basic function
@@ -79,9 +79,9 @@ static int rsnd_mod_id_cmd(struct rsnd_mod *mod) 
	return rsnd_mod_id(mod);

}



u32 rsnd_read(struct rsnd_priv *priv,

	      struct rsnd_mod *mod, enum rsnd_reg reg)

u32 rsnd_mod_read(struct rsnd_mod *mod, enum rsnd_reg reg)

{

	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);

	struct device *dev = rsnd_priv_to_dev(priv);

	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);

	u32 val;
@@ -98,10 +98,10 @@ u32 rsnd_read(struct rsnd_priv *priv, 
	return val;

}



void rsnd_write(struct rsnd_priv *priv,

		struct rsnd_mod *mod,

void rsnd_mod_write(struct rsnd_mod *mod,

		    enum rsnd_reg reg, u32 data)

{

	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);

	struct device *dev = rsnd_priv_to_dev(priv);

	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
@@ -115,9 +115,10 @@ void rsnd_write(struct rsnd_priv *priv, 
		rsnd_reg_name(gen, reg), reg, data);

}



void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod,

void rsnd_mod_bset(struct rsnd_mod *mod,

		   enum rsnd_reg reg, u32 mask, u32 data)

{

	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);

	struct device *dev = rsnd_priv_to_dev(priv);

	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);

sound/soc/sh/rcar/rsnd.h

+164 −165
Original line number Diff line number Diff line
@@ -42,165 +42,175 @@ 
 */

enum rsnd_reg {

	/* SCU (MIX/CTU/DVC) */

	RSND_REG_SRC_I_BUSIF_MODE,

	RSND_REG_SRC_O_BUSIF_MODE,

	RSND_REG_SRC_ROUTE_MODE0,

	RSND_REG_SRC_SWRSR,

	RSND_REG_SRC_SRCIR,

	RSND_REG_SRC_ADINR,

	RSND_REG_SRC_IFSCR,

	RSND_REG_SRC_IFSVR,

	RSND_REG_SRC_SRCCR,

	RSND_REG_SRC_CTRL,

	RSND_REG_SRC_BSDSR,

	RSND_REG_SRC_BSISR,

	RSND_REG_SRC_INT_ENABLE0,

	RSND_REG_SRC_BUSIF_DALIGN,

	RSND_REG_SRCIN_TIMSEL0,

	RSND_REG_SRCIN_TIMSEL1,

	RSND_REG_SRCIN_TIMSEL2,

	RSND_REG_SRCIN_TIMSEL3,

	RSND_REG_SRCIN_TIMSEL4,

	RSND_REG_SRCOUT_TIMSEL0,

	RSND_REG_SRCOUT_TIMSEL1,

	RSND_REG_SRCOUT_TIMSEL2,

	RSND_REG_SRCOUT_TIMSEL3,

	RSND_REG_SRCOUT_TIMSEL4,

	RSND_REG_SCU_SYS_STATUS0,

	RSND_REG_SCU_SYS_STATUS1,

	RSND_REG_SCU_SYS_INT_EN0,

	RSND_REG_SCU_SYS_INT_EN1,

	RSND_REG_CMD_CTRL,

	RSND_REG_CMD_BUSIF_MODE,

	RSND_REG_CMD_BUSIF_DALIGN,

	RSND_REG_CMD_ROUTE_SLCT,

	RSND_REG_CMDOUT_TIMSEL,

	RSND_REG_CTU_SWRSR,

	RSND_REG_CTU_CTUIR,

	RSND_REG_CTU_ADINR,

	RSND_REG_CTU_CPMDR,

	RSND_REG_CTU_SCMDR,

	RSND_REG_CTU_SV00R,

	RSND_REG_CTU_SV01R,

	RSND_REG_CTU_SV02R,

	RSND_REG_CTU_SV03R,

	RSND_REG_CTU_SV04R,

	RSND_REG_CTU_SV05R,

	RSND_REG_CTU_SV06R,

	RSND_REG_CTU_SV07R,

	RSND_REG_CTU_SV10R,

	RSND_REG_CTU_SV11R,

	RSND_REG_CTU_SV12R,

	RSND_REG_CTU_SV13R,

	RSND_REG_CTU_SV14R,

	RSND_REG_CTU_SV15R,

	RSND_REG_CTU_SV16R,

	RSND_REG_CTU_SV17R,

	RSND_REG_CTU_SV20R,

	RSND_REG_CTU_SV21R,

	RSND_REG_CTU_SV22R,

	RSND_REG_CTU_SV23R,

	RSND_REG_CTU_SV24R,

	RSND_REG_CTU_SV25R,

	RSND_REG_CTU_SV26R,

	RSND_REG_CTU_SV27R,

	RSND_REG_CTU_SV30R,

	RSND_REG_CTU_SV31R,

	RSND_REG_CTU_SV32R,

	RSND_REG_CTU_SV33R,

	RSND_REG_CTU_SV34R,

	RSND_REG_CTU_SV35R,

	RSND_REG_CTU_SV36R,

	RSND_REG_CTU_SV37R,

	RSND_REG_MIX_SWRSR,

	RSND_REG_MIX_MIXIR,

	RSND_REG_MIX_ADINR,

	RSND_REG_MIX_MIXMR,

	RSND_REG_MIX_MVPDR,

	RSND_REG_MIX_MDBAR,

	RSND_REG_MIX_MDBBR,

	RSND_REG_MIX_MDBCR,

	RSND_REG_MIX_MDBDR,

	RSND_REG_MIX_MDBER,

	RSND_REG_DVC_SWRSR,

	RSND_REG_DVC_DVUIR,

	RSND_REG_DVC_ADINR,

	RSND_REG_DVC_DVUCR,

	RSND_REG_DVC_ZCMCR,

	RSND_REG_DVC_VOL0R,

	RSND_REG_DVC_VOL1R,

	RSND_REG_DVC_VOL2R,

	RSND_REG_DVC_VOL3R,

	RSND_REG_DVC_VOL4R,

	RSND_REG_DVC_VOL5R,

	RSND_REG_DVC_VOL6R,

	RSND_REG_DVC_VOL7R,

	RSND_REG_DVC_DVUER,

	RSND_REG_DVC_VRCTR,

	RSND_REG_DVC_VRPDR,

	RSND_REG_DVC_VRDBR,

	SRC_I_BUSIF_MODE,

	SRC_O_BUSIF_MODE,

	SRC_ROUTE_MODE0,

	SRC_SWRSR,

	SRC_SRCIR,

	SRC_ADINR,

	SRC_IFSCR,

	SRC_IFSVR,

	SRC_SRCCR,

	SRC_CTRL,

	SRC_BSDSR,

	SRC_BSISR,

	SRC_INT_ENABLE0,

	SRC_BUSIF_DALIGN,

	SRCIN_TIMSEL0,

	SRCIN_TIMSEL1,

	SRCIN_TIMSEL2,

	SRCIN_TIMSEL3,

	SRCIN_TIMSEL4,

	SRCOUT_TIMSEL0,

	SRCOUT_TIMSEL1,

	SRCOUT_TIMSEL2,

	SRCOUT_TIMSEL3,

	SRCOUT_TIMSEL4,

	SCU_SYS_STATUS0,

	SCU_SYS_STATUS1,

	SCU_SYS_INT_EN0,

	SCU_SYS_INT_EN1,

	CMD_CTRL,

	CMD_BUSIF_MODE,

	CMD_BUSIF_DALIGN,

	CMD_ROUTE_SLCT,

	CMDOUT_TIMSEL,

	CTU_SWRSR,

	CTU_CTUIR,

	CTU_ADINR,

	CTU_CPMDR,

	CTU_SCMDR,

	CTU_SV00R,

	CTU_SV01R,

	CTU_SV02R,

	CTU_SV03R,

	CTU_SV04R,

	CTU_SV05R,

	CTU_SV06R,

	CTU_SV07R,

	CTU_SV10R,

	CTU_SV11R,

	CTU_SV12R,

	CTU_SV13R,

	CTU_SV14R,

	CTU_SV15R,

	CTU_SV16R,

	CTU_SV17R,

	CTU_SV20R,

	CTU_SV21R,

	CTU_SV22R,

	CTU_SV23R,

	CTU_SV24R,

	CTU_SV25R,

	CTU_SV26R,

	CTU_SV27R,

	CTU_SV30R,

	CTU_SV31R,

	CTU_SV32R,

	CTU_SV33R,

	CTU_SV34R,

	CTU_SV35R,

	CTU_SV36R,

	CTU_SV37R,

	MIX_SWRSR,

	MIX_MIXIR,

	MIX_ADINR,

	MIX_MIXMR,

	MIX_MVPDR,

	MIX_MDBAR,

	MIX_MDBBR,

	MIX_MDBCR,

	MIX_MDBDR,

	MIX_MDBER,

	DVC_SWRSR,

	DVC_DVUIR,

	DVC_ADINR,

	DVC_DVUCR,

	DVC_ZCMCR,

	DVC_VOL0R,

	DVC_VOL1R,

	DVC_VOL2R,

	DVC_VOL3R,

	DVC_VOL4R,

	DVC_VOL5R,

	DVC_VOL6R,

	DVC_VOL7R,

	DVC_DVUER,

	DVC_VRCTR,

	DVC_VRPDR,

	DVC_VRDBR,



	/* ADG */

	RSND_REG_BRRA,

	RSND_REG_BRRB,

	RSND_REG_BRGCKR,

	RSND_REG_DIV_EN,

	RSND_REG_AUDIO_CLK_SEL0,

	RSND_REG_AUDIO_CLK_SEL1,

	RSND_REG_AUDIO_CLK_SEL2,

	BRRA,

	BRRB,

	BRGCKR,

	DIV_EN,

	AUDIO_CLK_SEL0,

	AUDIO_CLK_SEL1,

	AUDIO_CLK_SEL2,



	/* SSIU */

	RSND_REG_SSI_MODE,

	RSND_REG_SSI_MODE0,

	RSND_REG_SSI_MODE1,

	RSND_REG_SSI_MODE2,

	RSND_REG_SSI_CONTROL,

	RSND_REG_SSI_CTRL,

	RSND_REG_SSI_BUSIF0_MODE,

	RSND_REG_SSI_BUSIF0_ADINR,

	RSND_REG_SSI_BUSIF0_DALIGN,

	RSND_REG_SSI_BUSIF1_MODE,

	RSND_REG_SSI_BUSIF1_ADINR,

	RSND_REG_SSI_BUSIF1_DALIGN,

	RSND_REG_SSI_BUSIF2_MODE,

	RSND_REG_SSI_BUSIF2_ADINR,

	RSND_REG_SSI_BUSIF2_DALIGN,

	RSND_REG_SSI_BUSIF3_MODE,

	RSND_REG_SSI_BUSIF3_ADINR,

	RSND_REG_SSI_BUSIF3_DALIGN,

	RSND_REG_SSI_BUSIF4_MODE,

	RSND_REG_SSI_BUSIF4_ADINR,

	RSND_REG_SSI_BUSIF4_DALIGN,

	RSND_REG_SSI_BUSIF5_MODE,

	RSND_REG_SSI_BUSIF5_ADINR,

	RSND_REG_SSI_BUSIF5_DALIGN,

	RSND_REG_SSI_BUSIF6_MODE,

	RSND_REG_SSI_BUSIF6_ADINR,

	RSND_REG_SSI_BUSIF6_DALIGN,

	RSND_REG_SSI_BUSIF7_MODE,

	RSND_REG_SSI_BUSIF7_ADINR,

	RSND_REG_SSI_BUSIF7_DALIGN,

	RSND_REG_SSI_INT_ENABLE,

	RSND_REG_SSI_SYS_STATUS0,

	RSND_REG_SSI_SYS_STATUS1,

	RSND_REG_SSI_SYS_STATUS2,

	RSND_REG_SSI_SYS_STATUS3,

	RSND_REG_SSI_SYS_STATUS4,

	RSND_REG_SSI_SYS_STATUS5,

	RSND_REG_SSI_SYS_STATUS6,

	RSND_REG_SSI_SYS_STATUS7,

	RSND_REG_HDMI0_SEL,

	RSND_REG_HDMI1_SEL,

	SSI_MODE,

	SSI_MODE0,

	SSI_MODE1,

	SSI_MODE2,

	SSI_CONTROL,

	SSI_CTRL,

	SSI_BUSIF0_MODE,

	SSI_BUSIF1_MODE,

	SSI_BUSIF2_MODE,

	SSI_BUSIF3_MODE,

	SSI_BUSIF4_MODE,

	SSI_BUSIF5_MODE,

	SSI_BUSIF6_MODE,

	SSI_BUSIF7_MODE,

	SSI_BUSIF0_ADINR,

	SSI_BUSIF1_ADINR,

	SSI_BUSIF2_ADINR,

	SSI_BUSIF3_ADINR,

	SSI_BUSIF4_ADINR,

	SSI_BUSIF5_ADINR,

	SSI_BUSIF6_ADINR,

	SSI_BUSIF7_ADINR,

	SSI_BUSIF0_DALIGN,

	SSI_BUSIF1_DALIGN,

	SSI_BUSIF2_DALIGN,

	SSI_BUSIF3_DALIGN,

	SSI_BUSIF4_DALIGN,

	SSI_BUSIF5_DALIGN,

	SSI_BUSIF6_DALIGN,

	SSI_BUSIF7_DALIGN,

	SSI_INT_ENABLE,

	SSI_SYS_STATUS0,

	SSI_SYS_STATUS1,

	SSI_SYS_STATUS2,

	SSI_SYS_STATUS3,

	SSI_SYS_STATUS4,

	SSI_SYS_STATUS5,

	SSI_SYS_STATUS6,

	SSI_SYS_STATUS7,

	HDMI0_SEL,

	HDMI1_SEL,



	/* SSI */

	RSND_REG_SSICR,

	RSND_REG_SSISR,

	RSND_REG_SSITDR,

	RSND_REG_SSIRDR,

	RSND_REG_SSIWSR,

	SSICR,

	SSISR,

	SSITDR,

	SSIRDR,

	SSIWSR,



	RSND_REG_MAX,

	REG_MAX,

};

#define SRCIN_TIMSEL(i)		(SRCIN_TIMSEL0 + (i))

#define SRCOUT_TIMSEL(i)	(SRCOUT_TIMSEL0 + (i))

#define CTU_SVxxR(i, j)		(CTU_SV00R + (i * 8) + (j))

#define DVC_VOLxR(i)		(DVC_VOL0R + (i))

#define AUDIO_CLK_SEL(i)	(AUDIO_CLK_SEL0 + (i))

#define SSI_BUSIF_MODE(i)	(SSI_BUSIF0_MODE + (i))

#define SSI_BUSIF_ADINR(i)	(SSI_BUSIF0_ADINR + (i))

#define SSI_BUSIF_DALIGN(i)	(SSI_BUSIF0_DALIGN + (i))

#define SSI_SYS_STATUS(i)	(SSI_SYS_STATUS0 + (i))





struct rsnd_priv;

struct rsnd_mod;
@@ -210,20 +220,9 @@ struct rsnd_dai_stream; 
/*

 *	R-Car basic functions

 */

#define rsnd_mod_read(m, r) \

	rsnd_read(rsnd_mod_to_priv(m), m, RSND_REG_##r)

#define rsnd_mod_write(m, r, d) \

	rsnd_write(rsnd_mod_to_priv(m), m, RSND_REG_##r, d)

#define rsnd_mod_bset(m, r, s, d) \

	rsnd_bset(rsnd_mod_to_priv(m), m, RSND_REG_##r, s, d)



u32 rsnd_read(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg);

void rsnd_write(struct rsnd_priv *priv, struct rsnd_mod *mod,

		enum rsnd_reg reg, u32 data);

void rsnd_force_write(struct rsnd_priv *priv, struct rsnd_mod *mod,

		enum rsnd_reg reg, u32 data);

void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg,

		    u32 mask, u32 data);

u32 rsnd_mod_read(struct rsnd_mod *mod, enum rsnd_reg reg);

void rsnd_mod_write(struct rsnd_mod *mod, enum rsnd_reg reg, u32 data);

void rsnd_mod_bset(struct rsnd_mod *mod, enum rsnd_reg reg, u32 mask, u32 data);

u32 rsnd_get_adinr_bit(struct rsnd_mod *mod, struct rsnd_dai_stream *io);

u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io);

u32 rsnd_get_busif_shift(struct rsnd_dai_stream *io, struct rsnd_mod *mod);