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Commit b70ce2ab authored by yankejian's avatar yankejian Committed by David S. Miller
Browse files

dts: hisi: fixes no syscon fault when init mdio 



When linux start up, we get the log below:
"Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
mdio_bus mdio@803c0000: mdio sys ctl reg has not maped"

The source code about the subctrl is dealt syscon, but dts doesn't.
It cause such fault, so this patch adds the syscon info on dts files to
fixes it.

Signed-off-by: default avatarKejian Yan <yankejian@huawei.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9207f9d4

Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt

+16 −0
Original line number Diff line number Diff line
@@ -187,6 +187,22 @@ Example: 
		reg = <0xb0000000 0x10000>;

	};



Hisilicon HiP05 PERISUB system controller



Required properties:

- compatible : "hisilicon,hip05-perisubc", "syscon";

- reg : Register address and size



The HiP05 PERISUB system controller is shared by peripheral controllers in

HiP05 Soc to implement some basic configurations. The peripheral

controllers include mdio, ddr, iic, uart, timer and so on.



Example:

	/* for HiP05 perisub-ctrl-c system */

	peri_c_subctrl: syscon@80000000 {

		compatible = "hisilicon,hip05-perisubc", "syscon";

		reg = <0x0 0x80000000 0x0 0x10000>;

	};

-----------------------------------------------------------------------

Hisilicon CPU controller

arch/arm64/boot/dts/hisilicon/hip05.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -246,6 +246,11 @@ 
			clock-frequency = <200000000>;

		};



		peri_c_subctrl: syscon@80000000 {

			compatible = "hisilicon,hip05-perisubc", "syscon";

			reg = < 0x0 0x80000000 0x0 0x10000>;

		};



		uart0: uart@80300000 {

			compatible = "snps,dw-apb-uart";

			reg = <0x0 0x80300000 0x0 0x10000>;

arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -10,8 +10,8 @@ soc0: soc@000000000 { 
		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "hisilicon,hns-mdio";

		reg = <0x0 0x803c0000 0x0 0x10000

		       0x0 0x80000000 0x0 0x10000>;

		reg = <0x0 0x803c0000 0x0 0x10000>;

		subctrl-vbase = <&peri_c_subctrl>;



		soc0_phy0: ethernet-phy@0 {

			reg = <0x0>;