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Commit b66bc777 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull pin control fixes from Linus Walleij:

 - Mediatek Kconfig fix

 - Sunxi regulator, IRQ banks and pin base fixup

 - Intel Cherryview Strago DMI workaround

 - Potential regmap problem on mcp23s08

* tag 'pinctrl-v5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: sunxi: Correct number of IRQ banks on H6 main pin controller
  pinctrl: mcp23s08: spi: Fix regmap allocation for mcp23s18
  pinctrl: cherryview: fix Strago DMI workaround
  pinctrl: sunxi: Consider pin_base when calculating regulator array index
  pinctrl: sunxi: Fix and simplify pin bank regulator handling
  pinctrl: mediatek: fix Kconfig build errors for moore core
parents 8834f560 10098709
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+4 −4
Original line number Original line Diff line number Diff line
@@ -1513,7 +1513,7 @@ static const struct dmi_system_id chv_no_valid_mask[] = {
		.matches = {
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
			DMI_MATCH(DMI_PRODUCT_FAMILY, "Intel_Strago"),
			DMI_MATCH(DMI_PRODUCT_FAMILY, "Intel_Strago"),
			DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
			DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
		},
		},
	},
	},
	{
	{
@@ -1521,7 +1521,7 @@ static const struct dmi_system_id chv_no_valid_mask[] = {
		.matches = {
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
			DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
			DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
			DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
			DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
		},
		},
	},
	},
	{
	{
@@ -1529,7 +1529,7 @@ static const struct dmi_system_id chv_no_valid_mask[] = {
		.matches = {
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
			DMI_MATCH(DMI_PRODUCT_NAME, "Cyan"),
			DMI_MATCH(DMI_PRODUCT_NAME, "Cyan"),
			DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
			DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
		},
		},
	},
	},
	{
	{
@@ -1537,7 +1537,7 @@ static const struct dmi_system_id chv_no_valid_mask[] = {
		.matches = {
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
			DMI_MATCH(DMI_PRODUCT_NAME, "Celes"),
			DMI_MATCH(DMI_PRODUCT_NAME, "Celes"),
			DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
			DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
		},
		},
	},
	},
	{}
	{}
+3 −0
Original line number Original line Diff line number Diff line
@@ -45,12 +45,14 @@ config PINCTRL_MT2701
config PINCTRL_MT7623
config PINCTRL_MT7623
	bool "Mediatek MT7623 pin control with generic binding"
	bool "Mediatek MT7623 pin control with generic binding"
	depends on MACH_MT7623 || COMPILE_TEST
	depends on MACH_MT7623 || COMPILE_TEST
	depends on OF
	default MACH_MT7623
	default MACH_MT7623
	select PINCTRL_MTK_MOORE
	select PINCTRL_MTK_MOORE


config PINCTRL_MT7629
config PINCTRL_MT7629
	bool "Mediatek MT7629 pin control"
	bool "Mediatek MT7629 pin control"
	depends on MACH_MT7629 || COMPILE_TEST
	depends on MACH_MT7629 || COMPILE_TEST
	depends on OF
	default MACH_MT7629
	default MACH_MT7629
	select PINCTRL_MTK_MOORE
	select PINCTRL_MTK_MOORE


@@ -92,6 +94,7 @@ config PINCTRL_MT6797


config PINCTRL_MT7622
config PINCTRL_MT7622
	bool "MediaTek MT7622 pin control"
	bool "MediaTek MT7622 pin control"
	depends on OF
	depends on ARM64 || COMPILE_TEST
	depends on ARM64 || COMPILE_TEST
	default ARM64 && ARCH_MEDIATEK
	default ARM64 && ARCH_MEDIATEK
	select PINCTRL_MTK_MOORE
	select PINCTRL_MTK_MOORE
+6 −1
Original line number Original line Diff line number Diff line
@@ -832,8 +832,13 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
		break;
		break;


	case MCP_TYPE_S18:
	case MCP_TYPE_S18:
		one_regmap_config =
			devm_kmemdup(dev, &mcp23x17_regmap,
				sizeof(struct regmap_config), GFP_KERNEL);
		if (!one_regmap_config)
			return -ENOMEM;
		mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
		mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
					       &mcp23x17_regmap);
					       one_regmap_config);
		mcp->reg_shift = 1;
		mcp->reg_shift = 1;
		mcp->chip.ngpio = 16;
		mcp->chip.ngpio = 16;
		mcp->chip.label = "mcp23s18";
		mcp->chip.label = "mcp23s18";
+1 −1
Original line number Original line Diff line number Diff line
@@ -588,7 +588,7 @@ static const unsigned int h6_irq_bank_map[] = { 1, 5, 6, 7 };
static const struct sunxi_pinctrl_desc h6_pinctrl_data = {
static const struct sunxi_pinctrl_desc h6_pinctrl_data = {
	.pins = h6_pins,
	.pins = h6_pins,
	.npins = ARRAY_SIZE(h6_pins),
	.npins = ARRAY_SIZE(h6_pins),
	.irq_banks = 3,
	.irq_banks = 4,
	.irq_bank_map = h6_irq_bank_map,
	.irq_bank_map = h6_irq_bank_map,
	.irq_read_needs_mux = true,
	.irq_read_needs_mux = true,
};
};
+22 −22
Original line number Original line Diff line number Diff line
@@ -698,13 +698,17 @@ static int sunxi_pmx_request(struct pinctrl_dev *pctldev, unsigned offset)
{
{
	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
	unsigned short bank = offset / PINS_PER_BANK;
	unsigned short bank = offset / PINS_PER_BANK;
	struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank];
	unsigned short bank_offset = bank - pctl->desc->pin_base /
	struct regulator *reg;
					    PINS_PER_BANK;
	struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset];
	struct regulator *reg = s_reg->regulator;
	char supply[16];
	int ret;
	int ret;


	reg = s_reg->regulator;
	if (reg) {
	if (!reg) {
		refcount_inc(&s_reg->refcount);
		char supply[16];
		return 0;
	}


	snprintf(supply, sizeof(supply), "vcc-p%c", 'a' + bank);
	snprintf(supply, sizeof(supply), "vcc-p%c", 'a' + bank);
	reg = regulator_get(pctl->dev, supply);
	reg = regulator_get(pctl->dev, supply);
@@ -714,12 +718,6 @@ static int sunxi_pmx_request(struct pinctrl_dev *pctldev, unsigned offset)
		return PTR_ERR(reg);
		return PTR_ERR(reg);
	}
	}


		s_reg->regulator = reg;
		refcount_set(&s_reg->refcount, 1);
	} else {
		refcount_inc(&s_reg->refcount);
	}

	ret = regulator_enable(reg);
	ret = regulator_enable(reg);
	if (ret) {
	if (ret) {
		dev_err(pctl->dev,
		dev_err(pctl->dev,
@@ -727,13 +725,13 @@ static int sunxi_pmx_request(struct pinctrl_dev *pctldev, unsigned offset)
		goto out;
		goto out;
	}
	}


	s_reg->regulator = reg;
	refcount_set(&s_reg->refcount, 1);

	return 0;
	return 0;


out:
out:
	if (refcount_dec_and_test(&s_reg->refcount)) {
	regulator_put(s_reg->regulator);
	regulator_put(s_reg->regulator);
		s_reg->regulator = NULL;
	}


	return ret;
	return ret;
}
}
@@ -742,7 +740,9 @@ static int sunxi_pmx_free(struct pinctrl_dev *pctldev, unsigned offset)
{
{
	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
	struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
	unsigned short bank = offset / PINS_PER_BANK;
	unsigned short bank = offset / PINS_PER_BANK;
	struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank];
	unsigned short bank_offset = bank - pctl->desc->pin_base /
					    PINS_PER_BANK;
	struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset];


	if (!refcount_dec_and_test(&s_reg->refcount))
	if (!refcount_dec_and_test(&s_reg->refcount))
		return 0;
		return 0;
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