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Commit b53b8cda authored by Daniel Wang's avatar Daniel Wang Committed by Alex Deucher
Browse files

drm/amdgpu/vce4: fix a PSP loading VCE issue 



Fixed PSP loading issue for sriov.

Signed-off-by: default avatarDaniel Wang <Daniel.Wang2@amd.com>
Signed-off-by: default avatarXiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e993ca4f

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

+15 −3
Original line number Diff line number Diff line
@@ -291,9 +291,21 @@ static int vce_v4_0_sriov_start(struct amdgpu_device *adev) 
		INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_SWAP_CNTL1), 0);

		INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VM_CTRL), 0);



		INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0), adev->vce.gpu_addr >> 8);

		INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), adev->vce.gpu_addr >> 8);

		INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR2), adev->vce.gpu_addr >> 8);

		if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {

		    INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0),

				adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].mc_addr >> 8);

		    INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1),

				adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].mc_addr >> 8);

		    INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR2),

				adev->firmware.ucode[AMDGPU_UCODE_ID_VCE].mc_addr >> 8);

		} else {

		    INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0),

				adev->vce.gpu_addr >> 8);

		    INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1),

				adev->vce.gpu_addr >> 8);

		    INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR2),

				adev->vce.gpu_addr >> 8);

		}



		offset = AMDGPU_VCE_FIRMWARE_OFFSET;

		size = VCE_V4_0_FW_SIZE;