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Commit b51f0762 authored Oct 12, 2020 by Linyu Yuan

ARM: dts: msm: add USB3_DP_COM_TYPEC_STATUS register

Add USB3_DP_COM_TYPEC_STATUS register for Lahaina and Shima,
this register's bit0 is used indicates the type-c orientation.

Change-Id: I42e35da3074497f24858a313ad4d9235b4729423

parent d5166273

qcom/lahaina-usb.dtsi

+2 −1

Original line number	Diff line number	Diff line
		@@ -177,7 +177,8 @@
		USB3_DP_COM_RESET_OVRD_CTRL
		USB3_DP_COM_PHY_MODE_CTRL
		USB3_DP_COM_TYPEC_CTRL
		USB3_DP_PCS_CLAMP_ENABLE>;
		USB3_DP_PCS_CLAMP_ENABLE
		USB3_DP_COM_TYPEC_STATUS>;

		qcom,qmp-phy-init-seq =
		/* <reg_offset, value, delay> */

qcom/shima-usb.dtsi

+2 −1

Original line number	Diff line number	Diff line
		@@ -148,7 +148,8 @@
		USB3_DP_COM_RESET_OVRD_CTRL
		USB3_DP_COM_PHY_MODE_CTRL
		USB3_DP_COM_TYPEC_CTRL
		USB3_DP_PCS_CLAMP_ENABLE>;
		USB3_DP_PCS_CLAMP_ENABLE
		USB3_DP_COM_TYPEC_STATUS>;

		qcom,qmp-phy-init-seq =
		/* <reg_offset, value, delay> */