Merge "disp: msm: sde: avoid solver mode if autorefresh is enabled" (b44c7803) · Commits · e / devices / android_kernel_fairphone_FP5

msm/sde/sde_core_irq.c

+14 −12

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
		* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
		*/

		#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
		@@ -115,24 +115,26 @@ static int _sde_core_irq_enable(struct sde_kms *sde_kms, int irq_idx)

		SDE_EVT32(irq_idx,
		atomic_read(&sde_kms->irq_obj.enable_counts[irq_idx]));

		if (atomic_inc_return(&sde_kms->irq_obj.enable_counts[irq_idx]) == 1) {
		spin_lock_irqsave(&sde_kms->irq_obj.cb_lock, irq_flags);
		/* empty callback list but interrupt is being enabled */
		if (list_empty(&sde_kms->irq_obj.irq_cb_tbl[irq_idx]))
		SDE_ERROR("enabling irq_idx=%d with no callback\n",
		irq_idx);
		spin_unlock_irqrestore(&sde_kms->irq_obj.cb_lock, irq_flags);

		spin_lock_irqsave(&sde_kms->hw_intr->irq_lock, irq_flags);
		if (atomic_inc_return(&sde_kms->irq_obj.enable_counts[irq_idx]) == 1)
		ret = sde_kms->hw_intr->ops.enable_irq_nolock(
		sde_kms->hw_intr, irq_idx);
		spin_unlock_irqrestore(&sde_kms->hw_intr->irq_lock, irq_flags);
		}

		if (ret)
		SDE_ERROR("Fail to enable IRQ for irq_idx:%d\n", irq_idx);

		SDE_DEBUG("irq_idx=%d ret=%d\n", irq_idx, ret);

		if (atomic_read(&sde_kms->irq_obj.enable_counts[irq_idx]) == 1) {
		spin_lock_irqsave(&sde_kms->irq_obj.cb_lock, irq_flags);
		/* empty callback list but interrupt is enabled */
		if (list_empty(&sde_kms->irq_obj.irq_cb_tbl[irq_idx]))
		SDE_ERROR("irq_idx=%d enabled with no callback\n",
		irq_idx);
		spin_unlock_irqrestore(&sde_kms->irq_obj.cb_lock, irq_flags);
		}
		return ret;
		}

msm/sde/sde_encoder.c

+19 −0

Original line number	Diff line number	Diff line
		@@ -1190,6 +1190,7 @@ static int _sde_encoder_update_rsc_client(
		u32 qsync_mode = 0, v_front_porch;
		struct drm_display_mode *mode;
		bool is_vid_mode;
		struct drm_encoder *enc;

		if (!drm_enc \|\| !drm_enc->dev) {
		SDE_ERROR("invalid encoder arguments\n");
		@@ -1232,6 +1233,12 @@ static int _sde_encoder_update_rsc_client(
		else if (sde_encoder_check_curr_mode(drm_enc, MSM_DISPLAY_VIDEO_MODE))
		rsc_state = enable ? SDE_RSC_VID_STATE : SDE_RSC_IDLE_STATE;

		drm_for_each_encoder(enc, drm_enc->dev) {
		if (enc->base.id != drm_enc->base.id &&
		sde_encoder_in_cont_splash(enc))
		rsc_state = SDE_RSC_CLK_STATE;
		}

		SDE_EVT32(rsc_state, qsync_mode);

		is_vid_mode = sde_encoder_check_curr_mode(&sde_enc->base,
		@@ -1805,6 +1812,14 @@ static int _sde_encoder_rc_post_modeset(struct drm_encoder *drm_enc,
		static int _sde_encoder_rc_idle(struct drm_encoder *drm_enc,
		u32 sw_event, struct sde_encoder_virt *sde_enc, bool is_vid_mode)
		{
		struct msm_drm_private *priv;
		struct sde_kms *sde_kms;
		struct drm_crtc *crtc = drm_enc->crtc;
		struct sde_crtc *sde_crtc = to_sde_crtc(crtc);

		priv = drm_enc->dev->dev_private;
		sde_kms = to_sde_kms(priv->kms);

		mutex_lock(&sde_enc->rc_lock);

		if (sde_enc->rc_state != SDE_ENC_RC_STATE_ON) {
		@@ -1829,6 +1844,10 @@ static int _sde_encoder_rc_idle(struct drm_encoder *drm_enc,
		/* disable all the clks and resources */
		_sde_encoder_update_rsc_client(drm_enc, false);
		_sde_encoder_resource_control_helper(drm_enc, false);

		if (!sde_kms->perf.bw_vote_mode)
		memset(&sde_crtc->cur_perf, 0,
		sizeof(struct sde_core_perf_params));
		}

		SDE_EVT32(DRMID(drm_enc), sw_event, sde_enc->rc_state,