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Unverified Commit b3fc4e0e authored by Mark Brown's avatar Mark Brown
Browse files

Merge branch 'spi-4.21' into spi-next

parents 2d549116 916d9802

Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt

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Nuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver



Nuvoton NPCM7xx SOC support two PSPI channels.



Required properties:

 - compatible : "nuvoton,npcm750-pspi" for NPCM7XX BMC

 - #address-cells : should be 1. see spi-bus.txt

 - #size-cells : should be 0. see spi-bus.txt

 - specifies physical base address and size of the register.

 - interrupts : contain PSPI interrupt.

 - clocks : phandle of PSPI reference clock.

 - clock-names: Should be "clk_apb5".

 - pinctrl-names : a pinctrl state named "default" must be defined.

 - pinctrl-0 : phandle referencing pin configuration of the device.

 - cs-gpios: Specifies the gpio pins to be used for chipselects.

            See: Documentation/devicetree/bindings/spi/spi-bus.txt



Optional properties:

- clock-frequency : Input clock frequency to the PSPI block in Hz.

		    Default is 25000000 Hz.



Aliases:

- All the SPI controller nodes should be represented in the aliases node using

  the following format 'spi{n}' withe the correct numbered in "aliases" node.



Example:



aliases {

	spi0 = &spi0;

};



spi0: spi@f0200000 {

	compatible = "nuvoton,npcm750-pspi";

	reg = <0xf0200000 0x1000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pspi1_pins>;

	#address-cells = <1>;

	#size-cells = <0>;

	interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;

	clocks = <&clk NPCM7XX_CLK_APB5>;

	clock-names = "clk_apb5";

	cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;

};

Documentation/devicetree/bindings/spi/omap-spi.txt

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@@ -2,6 +2,7 @@ OMAP2+ McSPI device 


Required properties:

- compatible :

  - "ti,am654-mcspi" for AM654.

  - "ti,omap2-mcspi" for OMAP2 & OMAP3.

  - "ti,omap4-mcspi" for OMAP4+.

- ti,spi-num-cs : Number of chipselect supported  by the instance.

Documentation/devicetree/bindings/spi/sh-msiof.txt

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@@ -5,6 +5,7 @@ Required properties: 
			 "renesas,msiof-r8a7744" (RZ/G1N)

			 "renesas,msiof-r8a7745" (RZ/G1E)

			 "renesas,msiof-r8a774a1" (RZ/G2M)

			 "renesas,msiof-r8a774c0" (RZ/G2E)

			 "renesas,msiof-r8a7790" (R-Car H2)

			 "renesas,msiof-r8a7791" (R-Car M2-W)

			 "renesas,msiof-r8a7792" (R-Car V2H)

Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt

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@@ -5,8 +5,11 @@ Required properties: 
  - "fsl,imx7ulp-spi" for LPSPI compatible with the one integrated on i.MX7ULP soc

  - "fsl,imx8qxp-spi" for LPSPI compatible with the one integrated on i.MX8QXP soc

- reg : address and length of the lpspi master registers

- interrupt-parent : core interrupt controller

- interrupts : lpspi interrupt

- clocks : lpspi clock specifier

- spi-slave : spi slave mode support. In slave mode, add this attribute without

	      value. In master mode, remove it.



Examples:
@@ -16,4 +19,5 @@ lpspi2: lpspi@40290000 { 
	interrupt-parent = <&intc>;

	interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;

	clocks = <&clks IMX7ULP_CLK_LPSPI2>;

	spi-slave;

};

Documentation/devicetree/bindings/spi/spi-mt65xx.txt

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@@ -6,8 +6,10 @@ Required properties: 
    - mediatek,mt2712-spi: for mt2712 platforms

    - mediatek,mt6589-spi: for mt6589 platforms

    - mediatek,mt7622-spi: for mt7622 platforms

    - "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms

    - mediatek,mt8135-spi: for mt8135 platforms

    - mediatek,mt8173-spi: for mt8173 platforms

    - mediatek,mt8183-spi: for mt8183 platforms



- #address-cells: should be 1.