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Commit b39d7efc authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'pwm/for-4.19-rc1' of...

Merge tag 'pwm/for-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This contains mostly minor bug fixes as well as some new chip support
  for existing drivers"

* tag 'pwm/for-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: mediatek: Add MT7628 support
  dt-bindings: pwm: Add MT7628 information
  dt-bindings: pwm: rcar: Add bindings for R-Car E3 support
  pwm: meson: Fix mux clock names
  pwm: stm32-lp: Remove useless loop in stm32_pwm_lp_remove()
  pwm: omap-dmtimer: Return -EPROBE_DEFER if no dmtimer platform data
  pwm: mxs: Switch to SPDX identifier
  dt-bindings: pwm: fsl-ftm: Add compatible string for i.MX8QM
  pwm: fsl-ftm: Enable support for the new SoC i.MX8QM
  pwm: fsl-ftm: Added the support of per-compatible data
  pwm: fsl-ftm: Added a dedicated IP interface clock
  pwm: cros-ec: Switch to SPDX identifier
  pwm: imx: Switch to SPDX identifier
  pwm: tiehrpwm: Fix disabling of output of PWMs
  pwm: tiehrpwm: Don't use emulation mode bits to control PWM output
  pwm: berlin: Don't use broken prescaler values
parents 06e386a1 8cdc43af
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+4 −1
Original line number Diff line number Diff line
@@ -16,7 +16,10 @@ modes in device tree.


Required properties:
- compatible: Should be "fsl,vf610-ftm-pwm".
- compatible : should be "fsl,<soc>-ftm-pwm" and one of the following
   compatible strings:
  - "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610
  - "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM
- reg: Physical base address and length of the controller's registers
- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
  the cells format.
+3 −1
Original line number Diff line number Diff line
@@ -5,11 +5,13 @@ Required properties:
   - "mediatek,mt2712-pwm": found on mt2712 SoC.
   - "mediatek,mt7622-pwm": found on mt7622 SoC.
   - "mediatek,mt7623-pwm": found on mt7623 SoC.
   - "mediatek,mt7628-pwm": found on mt7628 SoC.
 - reg: physical base address and length of the controller's registers.
 - #pwm-cells: must be 2. See pwm.txt in this directory for a description of
   the cell format.
 - clocks: phandle and clock specifier of the PWM reference clock.
 - clock-names: must contain the following:
 - clock-names: must contain the following, except for MT7628 which
                has no clocks
   - "top": the top clock generator
   - "main": clock used by the PWM core
   - "pwm1-8": the eight per PWM clocks for mt2712
+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ Required Properties:
 - "renesas,pwm-r8a7795": for R-Car H3
 - "renesas,pwm-r8a7796": for R-Car M3-W
 - "renesas,pwm-r8a77965": for R-Car M3-N
 - "renesas,pwm-r8a77990": for R-Car E3
 - "renesas,pwm-r8a77995": for R-Car D3
- reg: base address and length of the registers block for the PWM.
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+1 −1
Original line number Diff line number Diff line
@@ -286,7 +286,7 @@ config PWM_MTK_DISP

config PWM_MEDIATEK
	tristate "MediaTek PWM support"
	depends on ARCH_MEDIATEK || COMPILE_TEST
	depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST
	help
	  Generic PWM framework driver for Mediatek ARM SoC.

+25 −20
Original line number Diff line number Diff line
@@ -21,8 +21,18 @@
#define BERLIN_PWM_EN			0x0
#define  BERLIN_PWM_ENABLE		BIT(0)
#define BERLIN_PWM_CONTROL		0x4
#define  BERLIN_PWM_PRESCALE_MASK	0x7
#define  BERLIN_PWM_PRESCALE_MAX	4096
/*
 * The prescaler claims to support 8 different moduli, configured using the
 * low three bits of PWM_CONTROL. (Sequentially, they are 1, 4, 8, 16, 64,
 * 256, 1024, and 4096.)  However, the moduli from 4 to 1024 appear to be
 * implemented by internally shifting TCNT left without adding additional
 * bits. So, the max TCNT that actually works for a modulus of 4 is 0x3fff;
 * for 8, 0x1fff; and so on. This means that those moduli are entirely
 * useless, as we could just do the shift ourselves. The 4096 modulus is
 * implemented with a real prescaler, so we do use that, but we treat it
 * as a flag instead of pretending the modulus is actually configurable.
 */
#define  BERLIN_PWM_PRESCALE_4096	0x7
#define  BERLIN_PWM_INVERT_POLARITY	BIT(3)
#define BERLIN_PWM_DUTY			0x8
#define BERLIN_PWM_TCNT			0xc
@@ -46,10 +56,6 @@ static inline struct berlin_pwm_chip *to_berlin_pwm_chip(struct pwm_chip *chip)
	return container_of(chip, struct berlin_pwm_chip, chip);
}

static const u32 prescaler_table[] = {
	1, 4, 8, 16, 64, 256, 1024, 4096
};

static inline u32 berlin_pwm_readl(struct berlin_pwm_chip *chip,
				   unsigned int channel, unsigned long offset)
{
@@ -86,33 +92,32 @@ static int berlin_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm_dev,
			     int duty_ns, int period_ns)
{
	struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip);
	unsigned int prescale;
	bool prescale_4096 = false;
	u32 value, duty, period;
	u64 cycles, tmp;
	u64 cycles;

	cycles = clk_get_rate(pwm->clk);
	cycles *= period_ns;
	do_div(cycles, NSEC_PER_SEC);

	for (prescale = 0; prescale < ARRAY_SIZE(prescaler_table); prescale++) {
		tmp = cycles;
		do_div(tmp, prescaler_table[prescale]);
	if (cycles > BERLIN_PWM_MAX_TCNT) {
		prescale_4096 = true;
		cycles >>= 12; // Prescaled by 4096

		if (tmp <= BERLIN_PWM_MAX_TCNT)
			break;
	}

	if (tmp > BERLIN_PWM_MAX_TCNT)
		if (cycles > BERLIN_PWM_MAX_TCNT)
			return -ERANGE;
	}

	period = tmp;
	cycles = tmp * duty_ns;
	period = cycles;
	cycles *= duty_ns;
	do_div(cycles, period_ns);
	duty = cycles;

	value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_CONTROL);
	value &= ~BERLIN_PWM_PRESCALE_MASK;
	value |= prescale;
	if (prescale_4096)
		value |= BERLIN_PWM_PRESCALE_4096;
	else
		value &= ~BERLIN_PWM_PRESCALE_4096;
	berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_CONTROL);

	berlin_pwm_writel(pwm, pwm_dev->hwpwm, duty, BERLIN_PWM_DUTY);
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