mt76x0: remove eeprom dependency from mt76x0_set_tx_power_per_rate (b37bbc8c) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/net/wireless/mediatek/mt76/mt76x0/debugfs.c

+19 −13

Original line number	Original line	Diff line number	Diff line
	@@ -118,19 +118,6 @@ mt76x0_eeprom_param_read(struct seq_file file, void data)
	for (i = 0; i < 58; i++)		for (i = 0; i < 58; i++)
	seq_printf(file, "\t%d chan:%d pwr:%d\n", i, i,		seq_printf(file, "\t%d chan:%d pwr:%d\n", i, i,
	dev->ee->tx_pwr_per_chan[i]);		dev->ee->tx_pwr_per_chan[i]);

	seq_puts(file, "Per rate power 2GHz:\n");
	for (i = 0; i < 5; i++)
	seq_printf(file, "\t %d bw20:%d bw40:%d\n",
	i, dev->ee->tx_pwr_cfg_2g[i][0],
	dev->ee->tx_pwr_cfg_5g[i][1]);

	seq_puts(file, "Per rate power 5GHz:\n");
	for (i = 0; i < 5; i++)
	seq_printf(file, "\t %d bw20:%d bw40:%d\n",
	i, dev->ee->tx_pwr_cfg_5g[i][0],
	dev->ee->tx_pwr_cfg_5g[i][1]);

	return 0;		return 0;
	}		}

	@@ -147,6 +134,23 @@ static const struct file_operations fops_eeprom_param = {
	.release = single_release,		.release = single_release,
	};		};

			static int mt76x0_read_txpower(struct seq_file file, void data)
			{
			struct mt76x0_dev *dev = dev_get_drvdata(file->private);

			mt76_seq_puts_array(file, "CCK", dev->mt76.rate_power.cck,
			ARRAY_SIZE(dev->mt76.rate_power.cck));
			mt76_seq_puts_array(file, "OFDM", dev->mt76.rate_power.ofdm,
			ARRAY_SIZE(dev->mt76.rate_power.ofdm));
			mt76_seq_puts_array(file, "STBC", dev->mt76.rate_power.stbc,
			ARRAY_SIZE(dev->mt76.rate_power.stbc));
			mt76_seq_puts_array(file, "HT", dev->mt76.rate_power.ht,
			ARRAY_SIZE(dev->mt76.rate_power.ht));
			mt76_seq_puts_array(file, "VHT", dev->mt76.rate_power.vht,
			ARRAY_SIZE(dev->mt76.rate_power.vht));
			return 0;
			}

	void mt76x0_init_debugfs(struct mt76x0_dev *dev)		void mt76x0_init_debugfs(struct mt76x0_dev *dev)
	{		{
	struct dentry *dir;		struct dentry *dir;
	@@ -161,4 +165,6 @@ void mt76x0_init_debugfs(struct mt76x0_dev *dev)
	debugfs_create_file("ampdu_stat", S_IRUSR, dir, dev, &fops_ampdu_stat);		debugfs_create_file("ampdu_stat", S_IRUSR, dir, dev, &fops_ampdu_stat);
	debugfs_create_file("eeprom_param", S_IRUSR, dir, dev,		debugfs_create_file("eeprom_param", S_IRUSR, dir, dev,
	&fops_eeprom_param);		&fops_eeprom_param);
			debugfs_create_devm_seqfile(dev->mt76.dev, "txpower", dir,
			mt76x0_read_txpower);
	}		}

drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c

+74 −68

Original line number	Original line	Diff line number	Diff line
	@@ -20,6 +20,7 @@
	#include <asm/unaligned.h>		#include <asm/unaligned.h>
	#include "mt76x0.h"		#include "mt76x0.h"
	#include "eeprom.h"		#include "eeprom.h"
			#include "../mt76x02_phy.h"

	#define MT_MAP_READS DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16)		#define MT_MAP_READS DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16)
	static int		static int
	@@ -125,82 +126,88 @@ void mt76x0_read_rx_gain(struct mt76x0_dev *dev)
	}		}
	}		}

	static u32		static s8 mt76x0_get_delta(struct mt76_dev *dev)
	calc_bw40_power_rate(u32 value, int delta)
	{		{
	u32 ret = 0;		struct cfg80211_chan_def *chandef = &dev->chandef;
	int i, tmp;		u8 val;

	for (i = 0; i < 4; i++) {
	tmp = s6_to_int((value >> i*8) & 0xff) + delta;
	ret \|= (u32)(int_to_s6(tmp)) << i*8;
	}

	return ret;
	}

	static s8
	get_delta(u8 val)
	{
	s8 ret;

	if (!mt76x02_field_valid(val) \|\| !(val & BIT(7)))		if (mt76x02_tssi_enabled(dev))
	return 0;		return 0;

	ret = val & 0x1f;		if (chandef->width == NL80211_CHAN_WIDTH_80) {
	if (ret > 8)		val = mt76x02_eeprom_get(dev, MT_EE_5G_TARGET_POWER) >> 8;
	ret = 8;		} else if (chandef->width == NL80211_CHAN_WIDTH_40) {
	if (val & BIT(6))		u16 data;
	ret = -ret;

	return ret;		data = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW40);
			if (chandef->chan->band == NL80211_BAND_5GHZ)
			val = data >> 8;
			else
			val = data;
			} else {
			return 0;
	}		}

	static void		return mt76x02_rate_power_val(val);
	mt76x0_set_tx_power_per_rate(struct mt76x0_dev dev, u8 eeprom)
	{
	s8 bw40_delta_2g, bw40_delta_5g;
	u32 val;
	int i;

	bw40_delta_2g = get_delta(eeprom[MT_EE_TX_POWER_DELTA_BW40]);
	bw40_delta_5g = get_delta(eeprom[MT_EE_TX_POWER_DELTA_BW40 + 1]);

	for (i = 0; i < 5; i++) {
	val = get_unaligned_le32(eeprom + MT_EE_TX_POWER_BYRATE(i));

	/* Skip last 16 bits. */
	if (i == 4)
	val &= 0x0000ffff;

	dev->ee->tx_pwr_cfg_2g[i][0] = val;
	dev->ee->tx_pwr_cfg_2g[i][1] = calc_bw40_power_rate(val, bw40_delta_2g);
	}		}

	/* Reading per rate tx power for 5 GHz band is a bit more complex. Note		void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev)
	* we mix 16 bit and 32 bit reads and sometimes do shifts.		{
	*/		struct ieee80211_channel *chan = dev->mt76.chandef.chan;
	val = get_unaligned_le16(eeprom + 0x120);		bool is_2ghz = chan->band == NL80211_BAND_2GHZ;
	val <<= 16;		struct mt76_rate_power *t = &dev->mt76.rate_power;
	dev->ee->tx_pwr_cfg_5g[0][0] = val;		s8 delta = mt76x0_get_delta(&dev->mt76);
	dev->ee->tx_pwr_cfg_5g[0][1] = calc_bw40_power_rate(val, bw40_delta_5g);		u16 val, addr;

	val = get_unaligned_le32(eeprom + 0x122);		memset(t, 0, sizeof(*t));
	dev->ee->tx_pwr_cfg_5g[1][0] = val;
	dev->ee->tx_pwr_cfg_5g[1][1] = calc_bw40_power_rate(val, bw40_delta_5g);		/* cck 1M, 2M, 5.5M, 11M */
			val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_BYRATE_BASE);
	val = get_unaligned_le16(eeprom + 0x126);		t->cck[0] = t->cck[1] = s6_to_s8(val);
	dev->ee->tx_pwr_cfg_5g[2][0] = val;		t->cck[2] = t->cck[3] = s6_to_s8(val >> 8);
	dev->ee->tx_pwr_cfg_5g[2][1] = calc_bw40_power_rate(val, bw40_delta_5g);
			/* ofdm 6M, 9M, 12M, 18M */
	val = get_unaligned_le16(eeprom + 0xec);		addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 2 : 0x120;
	val <<= 16;		val = mt76x02_eeprom_get(&dev->mt76, addr);
	dev->ee->tx_pwr_cfg_5g[3][0] = val;		t->ofdm[0] = t->ofdm[1] = s6_to_s8(val);
	dev->ee->tx_pwr_cfg_5g[3][1] = calc_bw40_power_rate(val, bw40_delta_5g);		t->ofdm[2] = t->ofdm[3] = s6_to_s8(val >> 8);

	val = get_unaligned_le16(eeprom + 0xee);		/* ofdm 24M, 36M, 48M, 54M */
	dev->ee->tx_pwr_cfg_5g[4][0] = val;		addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 4 : 0x122;
	dev->ee->tx_pwr_cfg_5g[4][1] = calc_bw40_power_rate(val, bw40_delta_5g);		val = mt76x02_eeprom_get(&dev->mt76, addr);
			t->ofdm[4] = t->ofdm[5] = s6_to_s8(val);
			t->ofdm[6] = t->ofdm[7] = s6_to_s8(val >> 8);

			/* ht-vht mcs 1ss 0, 1, 2, 3 */
			addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 6 : 0x124;
			val = mt76x02_eeprom_get(&dev->mt76, addr);
			t->ht[0] = t->ht[1] = t->vht[0] = t->vht[1] = s6_to_s8(val);
			t->ht[2] = t->ht[3] = t->vht[2] = t->vht[3] = s6_to_s8(val >> 8);

			/* ht-vht mcs 1ss 4, 5, 6 */
			addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 8 : 0x126;
			val = mt76x02_eeprom_get(&dev->mt76, addr);
			t->ht[4] = t->ht[5] = t->vht[4] = t->vht[5] = s6_to_s8(val);
			t->ht[6] = t->vht[6] = s6_to_s8(val >> 8);

			/* ht-vht mcs 1ss 0, 1, 2, 3 stbc */
			addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 14 : 0xec;
			val = mt76x02_eeprom_get(&dev->mt76, addr);
			t->stbc[0] = t->stbc[1] = s6_to_s8(val);
			t->stbc[2] = t->stbc[3] = s6_to_s8(val >> 8);

			/* ht-vht mcs 1ss 4, 5, 6 stbc */
			addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 16 : 0xee;
			val = mt76x02_eeprom_get(&dev->mt76, addr);
			t->stbc[4] = t->stbc[5] = s6_to_s8(val);
			t->stbc[6] = t->stbc[7] = s6_to_s8(val >> 8);

			/* vht mcs 8, 9 5GHz */
			val = mt76x02_eeprom_get(&dev->mt76, 0x132);
			t->vht[7] = s6_to_s8(val);
			t->vht[8] = s6_to_s8(val >> 8);

			mt76x02_add_rate_power_offset(t, delta);
	}		}

	static void		static void
	@@ -271,7 +278,6 @@ mt76x0_eeprom_init(struct mt76x0_dev *dev)
	mt76x0_set_temp_offset(dev);		mt76x0_set_temp_offset(dev);
	dev->chainmask = 0x0101;		dev->chainmask = 0x0101;

	mt76x0_set_tx_power_per_rate(dev, eeprom);
	mt76x0_set_tx_power_per_chan(dev, eeprom);		mt76x0_set_tx_power_per_chan(dev, eeprom);

	out:		out:

drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.h

+6 −26

Original line number	Original line	Diff line number	Diff line
	@@ -37,41 +37,21 @@ struct mt76x0_caldata {
	};		};

	struct mt76x0_eeprom_params {		struct mt76x0_eeprom_params {
	/* TX_PWR_CFG_* values from EEPROM for 20 and 40 Mhz bandwidths. */
	u32 tx_pwr_cfg_2g[5][2];
	u32 tx_pwr_cfg_5g[5][2];

	u8 tx_pwr_per_chan[58];		u8 tx_pwr_per_chan[58];
	};		};

	int mt76x0_eeprom_init(struct mt76x0_dev *dev);		int mt76x0_eeprom_init(struct mt76x0_dev *dev);
	void mt76x0_read_rx_gain(struct mt76x0_dev *dev);		void mt76x0_read_rx_gain(struct mt76x0_dev *dev);
			void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev);

	static inline u32 s6_validate(u32 reg)		static inline s8 s6_to_s8(u32 val)
	{		{
	WARN_ON(reg & ~GENMASK(5, 0));		s8 ret = val & GENMASK(5, 0);
	return reg & GENMASK(5, 0);
	}

	static inline int s6_to_int(u32 reg)
	{
	int s6;

	s6 = s6_validate(reg);
	if (s6 & BIT(5))
	s6 -= BIT(6);

	return s6;
	}

	static inline u32 int_to_s6(int val)
	{
	if (val < -0x20)
	return 0x20;
	if (val > 0x1f)
	return 0x1f;

	return val & 0x3f;		if (ret & BIT(5))
			ret -= BIT(6);
			return ret;
	}		}

	#endif		#endif

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -641,6 +641,7 @@ __mt76x0_phy_set_channel(struct mt76x0_dev *dev,
	freq1 = chandef->center_freq1;		freq1 = chandef->center_freq1;
	channel = chandef->chan->hw_value;		channel = chandef->chan->hw_value;
	rf_bw_band = (channel <= 14) ? RF_G_BAND : RF_A_BAND;		rf_bw_band = (channel <= 14) ? RF_G_BAND : RF_A_BAND;
			dev->mt76.chandef = *chandef;

	switch (chandef->width) {		switch (chandef->width) {
	case NL80211_CHAN_WIDTH_40:		case NL80211_CHAN_WIDTH_40:
	@@ -678,6 +679,7 @@ __mt76x0_phy_set_channel(struct mt76x0_dev *dev,

	mt76x0_phy_set_band(dev, chandef->chan->band);		mt76x0_phy_set_band(dev, chandef->chan->band);
	mt76x0_phy_set_chan_rf_params(dev, channel, rf_bw_band);		mt76x0_phy_set_chan_rf_params(dev, channel, rf_bw_band);
			mt76x0_get_tx_power_per_rate(dev);
	mt76x0_read_rx_gain(dev);		mt76x0_read_rx_gain(dev);

	/* set Japan Tx filter at channel 14 */		/* set Japan Tx filter at channel 14 */
	@@ -699,7 +701,6 @@ __mt76x0_phy_set_channel(struct mt76x0_dev *dev,

	mt76x0_phy_set_chan_pwr(dev, channel);		mt76x0_phy_set_chan_pwr(dev, channel);

	dev->mt76.chandef = *chandef;
	return 0;		return 0;
	}		}

drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.h

+1 −3

Original line number	Original line	Diff line number	Diff line
	@@ -74,6 +74,7 @@ enum mt76x02_eeprom_field {

	MT_EE_2G_TARGET_POWER = 0x0d0,		MT_EE_2G_TARGET_POWER = 0x0d0,
	MT_EE_TEMP_OFFSET = 0x0d1,		MT_EE_TEMP_OFFSET = 0x0d1,
			MT_EE_5G_TARGET_POWER = 0x0d2,
	MT_EE_TSSI_BOUND1 = 0x0d4,		MT_EE_TSSI_BOUND1 = 0x0d4,
	MT_EE_TSSI_BOUND2 = 0x0d6,		MT_EE_TSSI_BOUND2 = 0x0d6,
	MT_EE_TSSI_BOUND3 = 0x0d8,		MT_EE_TSSI_BOUND3 = 0x0d8,
	@@ -121,9 +122,6 @@ enum mt76x02_eeprom_field {
	#define MT_EE_NIC_CONF_2_TEMP_DISABLE BIT(11)		#define MT_EE_NIC_CONF_2_TEMP_DISABLE BIT(11)
	#define MT_EE_NIC_CONF_2_COEX_METHOD GENMASK(15, 13)		#define MT_EE_NIC_CONF_2_COEX_METHOD GENMASK(15, 13)

	#define MT_EE_TX_POWER_BYRATE(x) (MT_EE_TX_POWER_BYRATE_BASE + \
	(x) * 4)

	#define MT_EFUSE_USAGE_MAP_SIZE (MT_EE_USAGE_MAP_END - \		#define MT_EFUSE_USAGE_MAP_SIZE (MT_EE_USAGE_MAP_END - \
	MT_EE_USAGE_MAP_START + 1)		MT_EE_USAGE_MAP_START + 1)