Loading bindings/clock/qcom,gpucc.txt +2 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ Required properties : - reg: shall contain base register offset and size. - reg-names: names of registers listed in the same order as in the reg property. Must contain "cc_base". - vdd_mx-supply: The vdd_mx logic rail supply. - #clock-cells : from common clock binding, shall contain 1 - #reset-cells : from common reset binding, shall contain 1 Loading @@ -33,6 +34,7 @@ Example: compatible = "qcom,lahaina-gpucc"; reg = <0x3d90000 0x9000>; reg-names = "cc_base"; vdd_mx-supply = <&VDD_MXA_LEVEL>; #clock-cells = <1>; #reset-cells = <1>; }; Loading
bindings/clock/qcom,gpucc.txt +2 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ Required properties : - reg: shall contain base register offset and size. - reg-names: names of registers listed in the same order as in the reg property. Must contain "cc_base". - vdd_mx-supply: The vdd_mx logic rail supply. - #clock-cells : from common clock binding, shall contain 1 - #reset-cells : from common reset binding, shall contain 1 Loading @@ -33,6 +34,7 @@ Example: compatible = "qcom,lahaina-gpucc"; reg = <0x3d90000 0x9000>; reg-names = "cc_base"; vdd_mx-supply = <&VDD_MXA_LEVEL>; #clock-cells = <1>; #reset-cells = <1>; };