Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Unverified Commit b2e628a8 authored by Paul Burton's avatar Paul Burton
Browse files

MIPS: cpu-probe: Avoid probing FPU when CONFIG_MIPS_FP_SUPPORT=n 



When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point so there's
no point in attempting to detect an FPU. Avoid doing so.

Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/21021/
Cc: linux-mips@linux-mips.org
parent 9ec55930

arch/mips/kernel/cpu-probe.c

+41 −13
Original line number Diff line number Diff line
@@ -36,6 +36,8 @@ 
unsigned int elf_hwcap __read_mostly;

EXPORT_SYMBOL_GPL(elf_hwcap);



#ifdef CONFIG_MIPS_FP_SUPPORT



/*

 * Get the FPU Implementation/Revision.

 */
@@ -58,19 +60,6 @@ static inline int __cpu_has_fpu(void) 
	return (cpu_get_fpu_id() & FPIR_IMP_MASK) != FPIR_IMP_NONE;

}



static inline unsigned long cpu_get_msa_id(void)

{

	unsigned long status, msa_id;



	status = read_c0_status();

	__enable_fpu(FPU_64BIT);

	enable_msa();

	msa_id = read_msa_ir();

	disable_msa();

	write_c0_status(status);

	return msa_id;

}



/*

 * Determine the FCSR mask for FPU hardware.

 */
@@ -326,6 +315,45 @@ static int __init fpu_disable(char *s) 


__setup("nofpu", fpu_disable);



#else /* !CONFIG_MIPS_FP_SUPPORT */



#define mips_fpu_disabled 1



static inline unsigned long cpu_get_fpu_id(void)

{

	return FPIR_IMP_NONE;

}



static inline int __cpu_has_fpu(void)

{

	return 0;

}



static void cpu_set_fpu_opts(struct cpuinfo_mips *c)

{

	/* no-op */

}



static void cpu_set_nofpu_opts(struct cpuinfo_mips *c)

{

	/* no-op */

}



#endif /* CONFIG_MIPS_FP_SUPPORT */



static inline unsigned long cpu_get_msa_id(void)

{

	unsigned long status, msa_id;



	status = read_c0_status();

	__enable_fpu(FPU_64BIT);

	enable_msa();

	msa_id = read_msa_ir();

	disable_msa();

	write_c0_status(status);

	return msa_id;

}



static int mips_dsp_disabled;



static int __init dsp_disable(char *s)