Merge "mmc: core: Enable force hw reset" (b28b8c7e) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/mmc/core/block.c

+8 −0

Original line number	Diff line number	Diff line
		@@ -1488,8 +1488,16 @@ void mmc_blk_cqe_recovery(struct mmc_queue *mq)
		pr_debug("%s: CQE recovery start\n", mmc_hostname(host));

		err = mmc_cqe_recovery(host);
		#if defined(CONFIG_SDC_QTI)
		if (err \|\| host->need_hw_reset) {
		mmc_blk_reset(mq->blkdata, host, MMC_BLK_CQE_RECOVERY);
		if (host->need_hw_reset)
		host->need_hw_reset = false;
		}
		#else
		if (err)
		mmc_blk_reset(mq->blkdata, host, MMC_BLK_CQE_RECOVERY);
		#endif
		mmc_blk_reset_success(mq->blkdata, MMC_BLK_CQE_RECOVERY);

		pr_debug("%s: CQE recovery done\n", mmc_hostname(host));

+7 −2

Original line number	Diff line number	Diff line
		@@ -853,19 +853,24 @@ static void cqhci_finish_mrq(struct mmc_host *mmc, unsigned int tag)
		irqreturn_t cqhci_irq(struct mmc_host *mmc, u32 intmask, int cmd_error,
		int data_error)
		{
		u32 status;
		u32 status, ice_err;
		unsigned long tag = 0, comp_status;
		struct cqhci_host *cq_host = mmc->cqe_private;

		status = cqhci_readl(cq_host, CQHCI_IS);
		cqhci_writel(cq_host, status, CQHCI_IS);
		ice_err = status & (CQHCI_IS_GCE \| CQHCI_IS_ICCE);

		pr_debug("%s: cqhci: IRQ status: 0x%08x\n", mmc_hostname(mmc), status);
		mmc_log_string(mmc, "CQIS: 0x%x cmd_error : %d data_err: %d\n",
		status, cmd_error, data_error);

		if ((status & CQHCI_IS_RED) \|\| cmd_error \|\| data_error)
		if ((status & CQHCI_IS_RED) \|\| cmd_error \|\| data_error \|\| ice_err) {
		#if defined(CONFIG_SDC_QTI)
		mmc->need_hw_reset = true;
		#endif
		cqhci_error_irq(mmc, status, cmd_error, data_error);
		}

		if (status & CQHCI_IS_TCC) {
		/* read TCN and complete the request */

+4 −1

Original line number	Diff line number	Diff line
		@@ -45,8 +45,11 @@
		#define CQHCI_IS_TCC BIT(1)
		#define CQHCI_IS_RED BIT(2)
		#define CQHCI_IS_TCL BIT(3)
		#define CQHCI_IS_GCE BIT(4)
		#define CQHCI_IS_ICCE BIT(5)

		#define CQHCI_IS_MASK (CQHCI_IS_TCC \| CQHCI_IS_RED)
		#define CQHCI_IS_MASK (CQHCI_IS_TCC \| CQHCI_IS_RED \| \
		CQHCI_IS_GCE \| CQHCI_IS_ICCE)

		/* interrupt status enable */
		#define CQHCI_ISTE 0x14

+3 −0