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Commit b27186ab authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 

Pull Devicetree updates from Rob Herring:
 "A bit bigger than normal as I've been busy this cycle.

  There's a few things with dependencies and a few things subsystem
  maintainers didn't pick up, so I'm taking them thru my tree.

  The fixes from Johan didn't get into linux-next, but they've been
  waiting for some time now and they are what's left of what subsystem
  maintainers didn't pick up.

  Summary:

   - Sync dtc with upstream version v1.4.7-14-gc86da84d30e4

   - Work to get rid of direct accesses to struct device_node name and
     type pointers in preparation for removing them. New helpers for
     parsing DT cpu nodes and conversions to use the helpers. printk
     conversions to %pOFn for printing DT node names. Most went thru
     subystem trees, so this is the remainder.

   - Fixes to DT child node lookups to actually be restricted to child
     nodes instead of treewide.

   - Refactoring of dtb targets out of arch code. This makes the support
     more uniform and enables building all dtbs on c6x, microblaze, and
     powerpc.

   - Various DT binding updates for Renesas r8a7744 SoC

   - Vendor prefixes for Facebook, OLPC

   - Restructuring of some ARM binding docs moving some peripheral
     bindings out of board/SoC binding files

   - New "secure-chosen" binding for secure world settings on ARM

   - Dual licensing of 2 DT IRQ binding headers"

* tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
  ARM: dt: relicense two DT binding IRQ headers
  power: supply: twl4030-charger: fix OF sibling-node lookup
  NFC: nfcmrvl_uart: fix OF child-node lookup
  net: stmmac: dwmac-sun8i: fix OF child-node lookup
  net: bcmgenet: fix OF child-node lookup
  drm/msm: fix OF child-node lookup
  drm/mediatek: fix OF sibling-node lookup
  of: Add missing exports of node name compare functions
  dt-bindings: Add OLPC vendor prefix
  dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus
  dt-bindings: thermal: samsung: Add SPDX license identifier
  dt-bindings: clock: samsung: Add SPDX license identifiers
  dt-bindings: timer: ostm: Add R7S9210 support
  dt-bindings: phy: rcar-gen2: Add r8a7744 support
  dt-bindings: can: rcar_can: Add r8a7744 support
  dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
  dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
  dt-bindings: thermal: rcar: Add device tree support for r8a7744
  Documentation: dt: Add binding for /secure-chosen/stdout-path
  dt-bindings: arm: zte: Move sysctrl bindings to their own doc
  ...
parents 0ef7791e d061864b

Documentation/devicetree/bindings/arm/al,alpine.txt

+0 −72
Original line number Diff line number Diff line
@@ -14,75 +14,3 @@ compatible: must contain "al,alpine" 


	...

}
 


* CPU node:



The Alpine platform includes cortex-a15 cores.

enable-method: must be "al,alpine-smp" to allow smp  [1]



Example:



cpus {

	#address-cells = <1>;

	#size-cells = <0>;

	enable-method = "al,alpine-smp";



	cpu@0 {

		compatible = "arm,cortex-a15";

		device_type = "cpu";

		reg = <0>;

	};



	cpu@1 {

		compatible = "arm,cortex-a15";

		device_type = "cpu";

		reg = <1>;

	};



	cpu@2 {

		compatible = "arm,cortex-a15";

		device_type = "cpu";

		reg = <2>;

	};



	cpu@3 {

		compatible = "arm,cortex-a15";

		device_type = "cpu";

		reg = <3>;

	};

};





* Alpine CPU resume registers



The CPU resume register are used to define required resume address after

reset.



Properties:

- compatible : Should contain "al,alpine-cpu-resume".

- reg : Offset and length of the register set for the device



Example:



cpu_resume {

	compatible = "al,alpine-cpu-resume";

	reg = <0xfbff5ed0 0x30>;

};



* Alpine System-Fabric Service Registers



The System-Fabric Service Registers allow various operation on CPU and

system fabric, like powering CPUs off.



Properties:

- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".

- reg : Offset and length of the register set for the device



Example:



nb_service {

        compatible = "al,alpine-sysfabric-service", "syscon";

        reg = <0xfb070000 0x10000>;

};



[1] arm/cpu-enable-method/al,alpine-smp

Documentation/devicetree/bindings/arm/atmel-at91.txt

+0 −170
Original line number Diff line number Diff line
@@ -70,173 +70,3 @@ compatible: must be one of: 
       - "atmel,samv71q19"

       - "atmel,samv71q20"

       - "atmel,samv71q21"
 


Chipid required properties:

- compatible: Should be "atmel,sama5d2-chipid"

- reg : Should contain registers location and length



PIT Timer required properties:

- compatible: Should be "atmel,at91sam9260-pit"

- reg: Should contain registers location and length

- interrupts: Should contain interrupt for the PIT which is the IRQ line

  shared across all System Controller members.



System Timer (ST) required properties:

- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"

- reg: Should contain registers location and length

- interrupts: Should contain interrupt for the ST which is the IRQ line

  shared across all System Controller members.

- clocks: phandle to input clock.

Its subnodes can be:

- watchdog: compatible should be "atmel,at91rm9200-wdt"



RSTC Reset Controller required properties:

- compatible: Should be "atmel,<chip>-rstc".

  <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"

- reg: Should contain registers location and length

- clocks: phandle to input clock.



Example:



	rstc@fffffd00 {

		compatible = "atmel,at91sam9260-rstc";

		reg = <0xfffffd00 0x10>;

		clocks = <&clk32k>;

	};



RAMC SDRAM/DDR Controller required properties:

- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"

			"atmel,at91sam9260-sdramc",

			"atmel,at91sam9g45-ddramc",

			"atmel,sama5d3-ddramc",

- reg: Should contain registers location and length



Examples:



	ramc0: ramc@ffffe800 {

		compatible = "atmel,at91sam9g45-ddramc";

		reg = <0xffffe800 0x200>;

	};



SHDWC Shutdown Controller



required properties:

- compatible: Should be "atmel,<chip>-shdwc".

  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".

- reg: Should contain registers location and length

- clocks: phandle to input clock.



optional properties:

- atmel,wakeup-mode: String, operation mode of the wakeup mode.

  Supported values are: "none", "high", "low", "any".

- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).



optional at91sam9260 properties:

- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.



optional at91sam9rl properties:

- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.

- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.



optional at91sam9x5 properties:

- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.



Example:



	shdwc@fffffd10 {

		compatible = "atmel,at91sam9260-shdwc";

		reg = <0xfffffd10 0x10>;

		clocks = <&clk32k>;

	};



SHDWC SAMA5D2-Compatible Shutdown Controller



1) shdwc node



required properties:

- compatible: should be "atmel,sama5d2-shdwc".

- reg: should contain registers location and length

- clocks: phandle to input clock.

- #address-cells: should be one. The cell is the wake-up input index.

- #size-cells: should be zero.



optional properties:



- debounce-delay-us: minimum wake-up inputs debouncer period in

  microseconds. It's usually a board-related property.

- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.



The node contains child nodes for each wake-up input that the platform uses.



2) input nodes



Wake-up input nodes are usually described in the "board" part of the Device

Tree. Note also that input 0 is linked to the wake-up pin and is frequently

used.



Required properties:

- reg: should contain the wake-up input index [0 - 15].



Optional properties:

- atmel,wakeup-active-high: boolean, the corresponding wake-up input described

  by the child, forces the wake-up of the core power supply on a high level.

  The default is to be active low.



Example:



On the SoC side:

	shdwc@f8048010 {

		compatible = "atmel,sama5d2-shdwc";

		reg = <0xf8048010 0x10>;

		clocks = <&clk32k>;

		#address-cells = <1>;

		#size-cells = <0>;

		atmel,wakeup-rtc-timer;

	};



On the board side:

	shdwc@f8048010 {

		debounce-delay-us = <976>;



		input@0 {

			reg = <0>;

		};



		input@1 {

			reg = <1>;

			atmel,wakeup-active-high;

		};

	};



Special Function Registers (SFR)



Special Function Registers (SFR) manage specific aspects of the integrated

memory, bridge implementations, processor and other functionality not controlled

elsewhere.



required properties:

- compatible: Should be "atmel,<chip>-sfr", "syscon" or

	"atmel,<chip>-sfrbu", "syscon"

  <chip> can be "sama5d3", "sama5d4" or "sama5d2".

- reg: Should contain registers location and length



	sfr@f0038000 {

		compatible = "atmel,sama5d3-sfr", "syscon";

		reg = <0xf0038000 0x60>;

	};



Security Module (SECUMOD)



The Security Module macrocell provides all necessary secure functions to avoid

voltage, temperature, frequency and mechanical attacks on the chip. It also

embeds secure memories that can be scrambled



required properties:

- compatible: Should be "atmel,<chip>-secumod", "syscon".

  <chip> can be "sama5d2".

- reg: Should contain registers location and length



	secumod@fc040000 {

		compatible = "atmel,sama5d2-secumod", "syscon";

		reg = <0xfc040000 0x100>;

	};

Documentation/devicetree/bindings/arm/atmel-sysregs.txt

0 → 100644
+171 −0
Original line number Diff line number Diff line 
Atmel system registers



Chipid required properties:

- compatible: Should be "atmel,sama5d2-chipid"

- reg : Should contain registers location and length



PIT Timer required properties:

- compatible: Should be "atmel,at91sam9260-pit"

- reg: Should contain registers location and length

- interrupts: Should contain interrupt for the PIT which is the IRQ line

  shared across all System Controller members.



System Timer (ST) required properties:

- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"

- reg: Should contain registers location and length

- interrupts: Should contain interrupt for the ST which is the IRQ line

  shared across all System Controller members.

- clocks: phandle to input clock.

Its subnodes can be:

- watchdog: compatible should be "atmel,at91rm9200-wdt"



RSTC Reset Controller required properties:

- compatible: Should be "atmel,<chip>-rstc".

  <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"

- reg: Should contain registers location and length

- clocks: phandle to input clock.



Example:



	rstc@fffffd00 {

		compatible = "atmel,at91sam9260-rstc";

		reg = <0xfffffd00 0x10>;

		clocks = <&clk32k>;

	};



RAMC SDRAM/DDR Controller required properties:

- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"

			"atmel,at91sam9260-sdramc",

			"atmel,at91sam9g45-ddramc",

			"atmel,sama5d3-ddramc",

- reg: Should contain registers location and length



Examples:



	ramc0: ramc@ffffe800 {

		compatible = "atmel,at91sam9g45-ddramc";

		reg = <0xffffe800 0x200>;

	};



SHDWC Shutdown Controller



required properties:

- compatible: Should be "atmel,<chip>-shdwc".

  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".

- reg: Should contain registers location and length

- clocks: phandle to input clock.



optional properties:

- atmel,wakeup-mode: String, operation mode of the wakeup mode.

  Supported values are: "none", "high", "low", "any".

- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).



optional at91sam9260 properties:

- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.



optional at91sam9rl properties:

- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.

- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.



optional at91sam9x5 properties:

- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.



Example:



	shdwc@fffffd10 {

		compatible = "atmel,at91sam9260-shdwc";

		reg = <0xfffffd10 0x10>;

		clocks = <&clk32k>;

	};



SHDWC SAMA5D2-Compatible Shutdown Controller



1) shdwc node



required properties:

- compatible: should be "atmel,sama5d2-shdwc".

- reg: should contain registers location and length

- clocks: phandle to input clock.

- #address-cells: should be one. The cell is the wake-up input index.

- #size-cells: should be zero.



optional properties:



- debounce-delay-us: minimum wake-up inputs debouncer period in

  microseconds. It's usually a board-related property.

- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.



The node contains child nodes for each wake-up input that the platform uses.



2) input nodes



Wake-up input nodes are usually described in the "board" part of the Device

Tree. Note also that input 0 is linked to the wake-up pin and is frequently

used.



Required properties:

- reg: should contain the wake-up input index [0 - 15].



Optional properties:

- atmel,wakeup-active-high: boolean, the corresponding wake-up input described

  by the child, forces the wake-up of the core power supply on a high level.

  The default is to be active low.



Example:



On the SoC side:

	shdwc@f8048010 {

		compatible = "atmel,sama5d2-shdwc";

		reg = <0xf8048010 0x10>;

		clocks = <&clk32k>;

		#address-cells = <1>;

		#size-cells = <0>;

		atmel,wakeup-rtc-timer;

	};



On the board side:

	shdwc@f8048010 {

		debounce-delay-us = <976>;



		input@0 {

			reg = <0>;

		};



		input@1 {

			reg = <1>;

			atmel,wakeup-active-high;

		};

	};



Special Function Registers (SFR)



Special Function Registers (SFR) manage specific aspects of the integrated

memory, bridge implementations, processor and other functionality not controlled

elsewhere.



required properties:

- compatible: Should be "atmel,<chip>-sfr", "syscon" or

	"atmel,<chip>-sfrbu", "syscon"

  <chip> can be "sama5d3", "sama5d4" or "sama5d2".

- reg: Should contain registers location and length



	sfr@f0038000 {

		compatible = "atmel,sama5d3-sfr", "syscon";

		reg = <0xf0038000 0x60>;

	};



Security Module (SECUMOD)



The Security Module macrocell provides all necessary secure functions to avoid

voltage, temperature, frequency and mechanical attacks on the chip. It also

embeds secure memories that can be scrambled



required properties:

- compatible: Should be "atmel,<chip>-secumod", "syscon".

  <chip> can be "sama5d2".

- reg: Should contain registers location and length



	secumod@fc040000 {

		compatible = "atmel,sama5d2-secumod", "syscon";

		reg = <0xfc040000 0x100>;

	};

Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp

+31 −3
Original line number Diff line number Diff line
@@ -14,7 +14,28 @@ Related properties: (none) 


Note:

This enable method requires valid nodes compatible with

"al,alpine-cpu-resume" and "al,alpine-nb-service"[1].

"al,alpine-cpu-resume" and "al,alpine-nb-service".





* Alpine CPU resume registers



The CPU resume register are used to define required resume address after

reset.



Properties:

- compatible : Should contain "al,alpine-cpu-resume".

- reg : Offset and length of the register set for the device





* Alpine System-Fabric Service Registers



The System-Fabric Service Registers allow various operation on CPU and

system fabric, like powering CPUs off.



Properties:

- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".

- reg : Offset and length of the register set for the device





Example:
@@ -48,5 +69,12 @@ cpus { 
	};

};



--

[1] arm/al,alpine.txt
 
cpu_resume {

	compatible = "al,alpine-cpu-resume";

	reg = <0xfbff5ed0 0x30>;

};



nb_service {

        compatible = "al,alpine-sysfabric-service", "syscon";

        reg = <0xfb070000 0x10000>;

};

Documentation/devicetree/bindings/arm/cpus.txt

+2 −2
Original line number Diff line number Diff line
@@ -276,7 +276,7 @@ described below. 
		Usage: optional

		Value type: <prop-encoded-array>

		Definition: A u32 value that represents the running time dynamic

			    power coefficient in units of mW/MHz/uV^2. The

			    power coefficient in units of uW/MHz/V^2. The

			    coefficient can either be calculated from power

			    measurements or derived by analysis.
@@ -287,7 +287,7 @@ described below. 


			    Pdyn = dynamic-power-coefficient * V^2 * f



			    where voltage is in uV, frequency is in MHz.

			    where voltage is in V, frequency is in MHz.



Example 1 (dual-cluster big.LITTLE system 32-bit):