Loading asoc/bengal.c +5 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> Loading Loading @@ -3956,6 +3957,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) */ mutex_lock(&mi2s_intf_conf[index].lock); if (++mi2s_intf_conf[index].ref_cnt == 1) { /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; ret = msm_mi2s_set_sclk(substream, true); if (ret < 0) { dev_err(rtd->card->dev, Loading @@ -3978,11 +3982,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) atomic_inc(&(pdata->mi2s_gpio_ref_count[index])); } } /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) { mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; if (!mi2s_intf_conf[index].msm_is_mi2s_master) fmt = SND_SOC_DAIFMT_CBM_CFM; } ret = snd_soc_dai_set_fmt(cpu_dai, fmt); if (ret < 0) { pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", Loading asoc/gvm_auto_spf_dummy.c +175 −35 Original line number Diff line number Diff line Loading @@ -219,44 +219,64 @@ static const struct snd_soc_dapm_widget msm_dapm_widgets[] = { static struct snd_soc_dai_link msm_common_dai_links[] = { /* BackEnd DAI Links */ { .name = "TERT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-TERTIARY", .name = "LPASS_BE_AUXPCM_RX_DUMMY", .stream_name = "AUXPCM-LPAIF-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_rx_0_dummy), SND_SOC_DAILINK_REG(lpass_be_auxpcm_rx_dummy), }, { .name = "TERT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-TERTIARY", .name = "LPASS_BE_AUXPCM_TX_DUMMY", .stream_name = "AUXPCM-LPAIF-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_tx_0_dummy), SND_SOC_DAILINK_REG(lpass_be_auxpcm_tx_dummy), }, { .name = "LPASS_BE_AUXPCM_RX_DUMMY", .stream_name = "AUXPCM-LPAIF-RX-PRIMARY", .name = "SEC_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-SECONDARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(lpass_be_auxpcm_rx_dummy), SND_SOC_DAILINK_REG(secondary_tdm_rx_0_dummy), }, { .name = "LPASS_BE_AUXPCM_TX_DUMMY", .stream_name = "AUXPCM-LPAIF-TX-PRIMARY", .name = "SEC_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-SECONDARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(lpass_be_auxpcm_tx_dummy), SND_SOC_DAILINK_REG(secondary_tdm_tx_0_dummy), }, { .name = "TERT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-TERTIARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_rx_0_dummy), }, { .name = "TERT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-TERTIARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_tx_0_dummy), }, { .name = "QUAT_TDM_RX_0_DUMMY", Loading @@ -278,6 +298,26 @@ static struct snd_soc_dai_link msm_common_dai_links[] = { .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quat_tdm_tx_0_dummy), }, { .name = "QUIN_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-QUINARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quin_tdm_rx_0_dummy), }, { .name = "QUIN_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-QUINARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quin_tdm_tx_0_dummy), }, }; static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { Loading Loading @@ -344,7 +384,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "QUAT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-QUATERNARY", .stream_name = "TDM-LPAIF_RXTX-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -354,7 +394,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "QUAT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-QUATERNARY", .stream_name = "TDM-LPAIF_RXTX-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -364,7 +404,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "QUIN_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-QUINARY", .stream_name = "TDM-LPAIF_VA-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -374,7 +414,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "QUIN_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-QUINARY", .stream_name = "TDM-LPAIF_VA-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -384,7 +424,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "SEN_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-SENARY", .stream_name = "TDM-LPAIF_WSA-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -394,7 +434,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "SEN_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-SENARY", .stream_name = "TDM-LPAIF_WSA-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -404,7 +444,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "SEP_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-SEPTENARY", .stream_name = "TDM-LPAIF_AUD-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -414,7 +454,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "SEP_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-SEPTENARY", .stream_name = "TDM-LPAIF_AUD-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -422,30 +462,70 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(sep_tdm_tx_0_dummy), }, }; static struct snd_soc_dai_link msm_talos_dai_links[] = { /* BackEnd DAI Links */ { .name = "PRIMARY_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_WSA-RX-PRIMARY", .dpcm_playback = 1, .name = "HS_IF0_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-RX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(primary_tdm_rx_0_dummy), SND_SOC_DAILINK_REG(hs_if0_tdm_rx_0_dummy), }, { .name = "PRIMARY_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_WSA-TX-PRIMARY", .name = "HS_IF0_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(primary_tdm_tx_0_dummy), SND_SOC_DAILINK_REG(hs_if0_tdm_tx_0_dummy), }, { .name = "HS_IF1_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-RX-SECONDARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(hs_if1_tdm_rx_0_dummy), }, { .name = "HS_IF1_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-TX-SECONDARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(hs_if1_tdm_tx_0_dummy), }, { .name = "HS_IF2_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-RX-TERTIARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(hs_if2_tdm_rx_0_dummy), }, { .name = "HS_IF2_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-TX-TERTIARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(hs_if2_tdm_tx_0_dummy), }, }; static struct snd_soc_dai_link msm_talos_dai_links[] = { /* BackEnd DAI Links */ { .name = "LPASS_BE_AUXPCM_RX_DUMMY", .stream_name = "AUXPCM-LPAIF-RX-PRIMARY", Loading @@ -466,9 +546,49 @@ static struct snd_soc_dai_link msm_talos_dai_links[] = { .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(lpass_be_auxpcm_tx_dummy), }, { .name = "SEC_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-SECONDARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(secondary_tdm_rx_0_dummy), }, { .name = "SEC_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-SECONDARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(secondary_tdm_tx_0_dummy), }, { .name = "TERT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_WSA-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_rx_0_dummy), }, { .name = "TERT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_WSA-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_tx_0_dummy), }, { .name = "QUAT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-QUATERNARY", .stream_name = "TDM-LPAIF_RXTX-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -478,7 +598,7 @@ static struct snd_soc_dai_link msm_talos_dai_links[] = { }, { .name = "QUAT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-QUATERNARY", .stream_name = "TDM-LPAIF_RXTX-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -486,6 +606,26 @@ static struct snd_soc_dai_link msm_talos_dai_links[] = { .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quat_tdm_tx_0_dummy), }, { .name = "QUIN_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-TERTIARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quin_tdm_rx_0_dummy), }, { .name = "QUIN_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-TERTIARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quin_tdm_tx_0_dummy), }, }; struct snd_soc_card snd_soc_card_auto_hana_dummy_msm = { Loading asoc/holi.c +5 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> Loading Loading @@ -4459,6 +4460,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) } if (++mi2s_intf_conf[index].ref_cnt == 1) { /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; ret = msm_mi2s_set_sclk(substream, true); if (ret < 0) { dev_err(rtd->card->dev, Loading @@ -4481,11 +4485,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) atomic_inc(&(pdata->mi2s_gpio_ref_count[index])); } } /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) { mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; if (!mi2s_intf_conf[index].msm_is_mi2s_master) fmt = SND_SOC_DAIFMT_CBM_CFM; } ret = snd_soc_dai_set_fmt(cpu_dai, fmt); if (ret < 0) { pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", Loading asoc/kona.c +16 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> Loading Loading @@ -5100,6 +5101,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) } if (++mi2s_intf_conf[index].ref_cnt == 1) { /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; ret = msm_mi2s_set_sclk(substream, true); if (ret < 0) { dev_err(rtd->card->dev, Loading @@ -5122,11 +5126,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) atomic_inc(&(pdata->mi2s_gpio_ref_count[index])); } } /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) { mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; if (!mi2s_intf_conf[index].msm_is_mi2s_master) fmt = SND_SOC_DAIFMT_CBM_CFM; } ret = snd_soc_dai_set_fmt(cpu_dai, fmt); if (ret < 0) { pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", Loading Loading @@ -6841,6 +6842,17 @@ static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = { .ops = &msm_cdc_dma_be_ops, SND_SOC_DAILINK_REG(wsa_dma_tx1), }, { .name = LPASS_BE_WSA_CDC_DMA_TX_0_VI, .stream_name = "WSA CDC DMA0 Capture", .no_pcm = 1, .dpcm_capture = 1, .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0, .be_hw_params_fixup = msm_be_hw_params_fixup, .ignore_suspend = 1, .ops = &msm_cdc_dma_be_ops, SND_SOC_DAILINK_REG(wsa_dma_tx0_vi), }, }; static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = { Loading asoc/lahaina.c +5 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> Loading Loading @@ -5440,6 +5441,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__, mi2s_clk[index].clk_freq_in_hz); /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; ret = msm_mi2s_set_sclk(substream, true); if (ret < 0) { dev_err(rtd->card->dev, Loading @@ -5462,11 +5466,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) atomic_inc(&(pdata->mi2s_gpio_ref_count[index])); } } /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) { mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; if (!mi2s_intf_conf[index].msm_is_mi2s_master) fmt = SND_SOC_DAIFMT_CBM_CFM; } ret = snd_soc_dai_set_fmt(cpu_dai, fmt); if (ret < 0) { pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", Loading Loading
asoc/bengal.c +5 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> Loading Loading @@ -3956,6 +3957,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) */ mutex_lock(&mi2s_intf_conf[index].lock); if (++mi2s_intf_conf[index].ref_cnt == 1) { /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; ret = msm_mi2s_set_sclk(substream, true); if (ret < 0) { dev_err(rtd->card->dev, Loading @@ -3978,11 +3982,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) atomic_inc(&(pdata->mi2s_gpio_ref_count[index])); } } /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) { mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; if (!mi2s_intf_conf[index].msm_is_mi2s_master) fmt = SND_SOC_DAIFMT_CBM_CFM; } ret = snd_soc_dai_set_fmt(cpu_dai, fmt); if (ret < 0) { pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", Loading
asoc/gvm_auto_spf_dummy.c +175 −35 Original line number Diff line number Diff line Loading @@ -219,44 +219,64 @@ static const struct snd_soc_dapm_widget msm_dapm_widgets[] = { static struct snd_soc_dai_link msm_common_dai_links[] = { /* BackEnd DAI Links */ { .name = "TERT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-TERTIARY", .name = "LPASS_BE_AUXPCM_RX_DUMMY", .stream_name = "AUXPCM-LPAIF-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_rx_0_dummy), SND_SOC_DAILINK_REG(lpass_be_auxpcm_rx_dummy), }, { .name = "TERT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-TERTIARY", .name = "LPASS_BE_AUXPCM_TX_DUMMY", .stream_name = "AUXPCM-LPAIF-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_tx_0_dummy), SND_SOC_DAILINK_REG(lpass_be_auxpcm_tx_dummy), }, { .name = "LPASS_BE_AUXPCM_RX_DUMMY", .stream_name = "AUXPCM-LPAIF-RX-PRIMARY", .name = "SEC_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-SECONDARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(lpass_be_auxpcm_rx_dummy), SND_SOC_DAILINK_REG(secondary_tdm_rx_0_dummy), }, { .name = "LPASS_BE_AUXPCM_TX_DUMMY", .stream_name = "AUXPCM-LPAIF-TX-PRIMARY", .name = "SEC_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-SECONDARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(lpass_be_auxpcm_tx_dummy), SND_SOC_DAILINK_REG(secondary_tdm_tx_0_dummy), }, { .name = "TERT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-TERTIARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_rx_0_dummy), }, { .name = "TERT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-TERTIARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_tx_0_dummy), }, { .name = "QUAT_TDM_RX_0_DUMMY", Loading @@ -278,6 +298,26 @@ static struct snd_soc_dai_link msm_common_dai_links[] = { .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quat_tdm_tx_0_dummy), }, { .name = "QUIN_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-QUINARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quin_tdm_rx_0_dummy), }, { .name = "QUIN_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-QUINARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quin_tdm_tx_0_dummy), }, }; static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { Loading Loading @@ -344,7 +384,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "QUAT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-QUATERNARY", .stream_name = "TDM-LPAIF_RXTX-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -354,7 +394,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "QUAT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-QUATERNARY", .stream_name = "TDM-LPAIF_RXTX-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -364,7 +404,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "QUIN_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-QUINARY", .stream_name = "TDM-LPAIF_VA-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -374,7 +414,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "QUIN_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-QUINARY", .stream_name = "TDM-LPAIF_VA-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -384,7 +424,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "SEN_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-SENARY", .stream_name = "TDM-LPAIF_WSA-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -394,7 +434,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "SEN_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-SENARY", .stream_name = "TDM-LPAIF_WSA-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -404,7 +444,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "SEP_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-SEPTENARY", .stream_name = "TDM-LPAIF_AUD-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -414,7 +454,7 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { }, { .name = "SEP_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-SEPTENARY", .stream_name = "TDM-LPAIF_AUD-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -422,30 +462,70 @@ static struct snd_soc_dai_link msm_gvm8295_dai_links[] = { .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(sep_tdm_tx_0_dummy), }, }; static struct snd_soc_dai_link msm_talos_dai_links[] = { /* BackEnd DAI Links */ { .name = "PRIMARY_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_WSA-RX-PRIMARY", .dpcm_playback = 1, .name = "HS_IF0_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-RX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(primary_tdm_rx_0_dummy), SND_SOC_DAILINK_REG(hs_if0_tdm_rx_0_dummy), }, { .name = "PRIMARY_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_WSA-TX-PRIMARY", .name = "HS_IF0_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(primary_tdm_tx_0_dummy), SND_SOC_DAILINK_REG(hs_if0_tdm_tx_0_dummy), }, { .name = "HS_IF1_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-RX-SECONDARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(hs_if1_tdm_rx_0_dummy), }, { .name = "HS_IF1_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-TX-SECONDARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(hs_if1_tdm_tx_0_dummy), }, { .name = "HS_IF2_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-RX-TERTIARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(hs_if2_tdm_rx_0_dummy), }, { .name = "HS_IF2_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_SDR-TX-TERTIARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(hs_if2_tdm_tx_0_dummy), }, }; static struct snd_soc_dai_link msm_talos_dai_links[] = { /* BackEnd DAI Links */ { .name = "LPASS_BE_AUXPCM_RX_DUMMY", .stream_name = "AUXPCM-LPAIF-RX-PRIMARY", Loading @@ -466,9 +546,49 @@ static struct snd_soc_dai_link msm_talos_dai_links[] = { .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(lpass_be_auxpcm_tx_dummy), }, { .name = "SEC_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-SECONDARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(secondary_tdm_rx_0_dummy), }, { .name = "SEC_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-SECONDARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(secondary_tdm_tx_0_dummy), }, { .name = "TERT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF_WSA-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_rx_0_dummy), }, { .name = "TERT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF_WSA-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(tert_tdm_tx_0_dummy), }, { .name = "QUAT_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-QUATERNARY", .stream_name = "TDM-LPAIF_RXTX-RX-PRIMARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -478,7 +598,7 @@ static struct snd_soc_dai_link msm_talos_dai_links[] = { }, { .name = "QUAT_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-QUATERNARY", .stream_name = "TDM-LPAIF_RXTX-TX-PRIMARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, Loading @@ -486,6 +606,26 @@ static struct snd_soc_dai_link msm_talos_dai_links[] = { .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quat_tdm_tx_0_dummy), }, { .name = "QUIN_TDM_RX_0_DUMMY", .stream_name = "TDM-LPAIF-RX-TERTIARY", .dpcm_playback = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quin_tdm_rx_0_dummy), }, { .name = "QUIN_TDM_TX_0_DUMMY", .stream_name = "TDM-LPAIF-TX-TERTIARY", .dpcm_capture = 1, .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .ignore_suspend = 1, .ignore_pmdown_time = 1, SND_SOC_DAILINK_REG(quin_tdm_tx_0_dummy), }, }; struct snd_soc_card snd_soc_card_auto_hana_dummy_msm = { Loading
asoc/holi.c +5 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> Loading Loading @@ -4459,6 +4460,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) } if (++mi2s_intf_conf[index].ref_cnt == 1) { /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; ret = msm_mi2s_set_sclk(substream, true); if (ret < 0) { dev_err(rtd->card->dev, Loading @@ -4481,11 +4485,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) atomic_inc(&(pdata->mi2s_gpio_ref_count[index])); } } /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) { mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; if (!mi2s_intf_conf[index].msm_is_mi2s_master) fmt = SND_SOC_DAIFMT_CBM_CFM; } ret = snd_soc_dai_set_fmt(cpu_dai, fmt); if (ret < 0) { pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", Loading
asoc/kona.c +16 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> Loading Loading @@ -5100,6 +5101,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) } if (++mi2s_intf_conf[index].ref_cnt == 1) { /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; ret = msm_mi2s_set_sclk(substream, true); if (ret < 0) { dev_err(rtd->card->dev, Loading @@ -5122,11 +5126,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) atomic_inc(&(pdata->mi2s_gpio_ref_count[index])); } } /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) { mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; if (!mi2s_intf_conf[index].msm_is_mi2s_master) fmt = SND_SOC_DAIFMT_CBM_CFM; } ret = snd_soc_dai_set_fmt(cpu_dai, fmt); if (ret < 0) { pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", Loading Loading @@ -6841,6 +6842,17 @@ static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = { .ops = &msm_cdc_dma_be_ops, SND_SOC_DAILINK_REG(wsa_dma_tx1), }, { .name = LPASS_BE_WSA_CDC_DMA_TX_0_VI, .stream_name = "WSA CDC DMA0 Capture", .no_pcm = 1, .dpcm_capture = 1, .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0, .be_hw_params_fixup = msm_be_hw_params_fixup, .ignore_suspend = 1, .ops = &msm_cdc_dma_be_ops, SND_SOC_DAILINK_REG(wsa_dma_tx0_vi), }, }; static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = { Loading
asoc/lahaina.c +5 −4 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/clk.h> Loading Loading @@ -5440,6 +5441,9 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__, mi2s_clk[index].clk_freq_in_hz); /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; ret = msm_mi2s_set_sclk(substream, true); if (ret < 0) { dev_err(rtd->card->dev, Loading @@ -5462,11 +5466,8 @@ static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) atomic_inc(&(pdata->mi2s_gpio_ref_count[index])); } } /* Check if msm needs to provide the clock to the interface */ if (!mi2s_intf_conf[index].msm_is_mi2s_master) { mi2s_clk[index].clk_id = mi2s_ebit_clk[index]; if (!mi2s_intf_conf[index].msm_is_mi2s_master) fmt = SND_SOC_DAIFMT_CBM_CFM; } ret = snd_soc_dai_set_fmt(cpu_dai, fmt); if (ret < 0) { pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", Loading