Merge drm/drm-next into drm-intel-next-queued

  - 'ata_qc_for_each_with_internal'

  - 'ax25_for_each'

  - 'ax25_uid_for_each'

  - '__bio_for_each_bvec'

  - 'bio_for_each_bvec'

  - 'bio_for_each_integrity_vec'

  - '__bio_for_each_segment'

  - 'bio_for_each_segment'

  - 'drm_for_each_legacy_plane'

  - 'drm_for_each_plane'

  - 'drm_for_each_plane_mask'

  - 'drm_for_each_privobj'

  - 'drm_mm_for_each_hole'

  - 'drm_mm_for_each_node'

  - 'drm_mm_for_each_node_in_range'

  - 'drm_mm_for_each_node_safe'

  - 'flow_action_for_each'

  - 'for_each_active_drhd_unit'

  - 'for_each_active_iommu'

  - 'for_each_available_child_of_node'

  - 'for_each_dss_dev'

  - 'for_each_efi_memory_desc'

  - 'for_each_efi_memory_desc_in_map'

  - 'for_each_element'

  - 'for_each_element_extid'

  - 'for_each_element_id'

  - 'for_each_endpoint_of_node'

  - 'for_each_evictable_lru'

  - 'for_each_fib6_node_rt_rcu'

  - 'for_each_net_rcu'

  - 'for_each_new_connector_in_state'

  - 'for_each_new_crtc_in_state'

  - 'for_each_new_mst_mgr_in_state'

  - 'for_each_new_plane_in_state'

  - 'for_each_new_private_obj_in_state'

  - 'for_each_node'

  - 'for_each_of_pci_range'

  - 'for_each_old_connector_in_state'

  - 'for_each_old_crtc_in_state'

  - 'for_each_old_mst_mgr_in_state'

  - 'for_each_oldnew_connector_in_state'

  - 'for_each_oldnew_crtc_in_state'

  - 'for_each_oldnew_mst_mgr_in_state'

  - 'for_each_oldnew_plane_in_state'

  - 'for_each_oldnew_plane_in_state_reverse'

  - 'for_each_oldnew_private_obj_in_state'

  - 'for_each_sg_dma_page'

  - 'for_each_sg_page'

  - 'for_each_sibling_event'

  - 'for_each_subelement'

  - 'for_each_subelement_extid'

  - 'for_each_subelement_id'

  - '__for_each_thread'

  - 'for_each_thread'

  - 'for_each_zone'

  - 'fwnode_for_each_child_node'

  - 'fwnode_graph_for_each_endpoint'

  - 'gadget_for_each_ep'

  - 'genradix_for_each'

  - 'genradix_for_each_from'

  - 'hash_for_each'

  - 'hash_for_each_possible'

  - 'hash_for_each_possible_rcu'

  - 'key_for_each'

  - 'key_for_each_safe'

  - 'klp_for_each_func'

  - 'klp_for_each_func_safe'

  - 'klp_for_each_func_static'

  - 'klp_for_each_object'

  - 'klp_for_each_object_safe'

  - 'klp_for_each_object_static'

  - 'kvm_for_each_memslot'

  - 'kvm_for_each_vcpu'

  - 'list_for_each'

  - 'media_device_for_each_intf'

  - 'media_device_for_each_link'

  - 'media_device_for_each_pad'

  - 'mp_bvec_for_each_page'

  - 'mp_bvec_for_each_segment'

  - 'nanddev_io_for_each_page'

  - 'netdev_for_each_lower_dev'

  - 'netdev_for_each_lower_private'

  - 'rht_for_each_rcu'

  - 'rht_for_each_rcu_continue'

  - '__rq_for_each_bio'

  - 'rq_for_each_bvec'

  - 'rq_for_each_segment'

  - 'scsi_for_each_prot_sg'

  - 'scsi_for_each_sg'

  - 'v4l2_m2m_for_each_src_buf_safe'

  - 'virtio_device_for_each_vq'

  - 'xa_for_each'

  - 'xa_for_each_marked'

  - 'xa_for_each_start'

  - 'xas_for_each'

  - 'xas_for_each_conflict'

  - 'xas_for_each_marked'

Morten Welinder <welinder@troll.com>

Mythri P K <mythripk@ti.com>

Nguyen Anh Quynh <aquynh@gmail.com>

Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org>

Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org>

Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>

Patrick Mochel <mochel@digitalimplant.org>

Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>

Yusuke Goda <goda.yusuke@renesas.com>

Gustavo Padovan <gustavo@las.ic.unicamp.br>

Gustavo Padovan <padovan@profusion.mobi>

Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>

Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>

still doing productive work. As such, time spent in this subset of the

stall state is tracked separately and exported in the "full" averages.

The ratios are tracked as recent trends over ten, sixty, and three

hundred second windows, which gives insight into short term events as

well as medium and long term trends. The total absolute stall time is

tracked and exported as well, to allow detection of latency spikes

which wouldn't necessarily make a dent in the time averages, or to

average trends over custom time frames.

The ratios (in %) are tracked as recent trends over ten, sixty, and

three hundred second windows, which gives insight into short term events

as well as medium and long term trends. The total absolute stall time

(in us) is tracked and exported as well, to allow detection of latency

spikes which wouldn't necessarily make a dent in the time averages,

or to average trends over custom time frames.

Cgroup2 interface

=================

for the type. The maximum value of ``BTF_INT_BITS()`` is 128.

The ``BTF_INT_OFFSET()`` specifies the starting bit offset to calculate values

for this int. For example, a bitfield struct member has: * btf member bit

offset 100 from the start of the structure, * btf member pointing to an int

type, * the int type has ``BTF_INT_OFFSET() = 2`` and ``BTF_INT_BITS() = 4``

for this int. For example, a bitfield struct member has:

 * btf member bit offset 100 from the start of the structure,

 * btf member pointing to an int type,

 * the int type has ``BTF_INT_OFFSET() = 2`` and ``BTF_INT_BITS() = 4``

Then in the struct memory layout, this member will occupy ``4`` bits starting

from bits ``100 + 2 = 102``.

Alternatively, the bitfield struct member can be the following to access the

same bits as the above:

 * btf member bit offset 102,

 * btf member pointing to an int type,

 * the int type has ``BTF_INT_OFFSET() = 0`` and ``BTF_INT_BITS() = 4``

	- GXL (S905X, S905D) : "amlogic,meson-gxl-dw-hdmi"

	- GXM (S912) : "amlogic,meson-gxm-dw-hdmi"

	followed by the common "amlogic,meson-gx-dw-hdmi"

	- G12A (S905X2, S905Y2, S905D2) : "amlogic,meson-g12a-dw-hdmi"

- reg: Physical base address and length of the controller's registers.

- interrupts: The HDMI interrupt number

- clocks, clock-names : must have the phandles to the HDMI iahb and isfr clocks,

 S905X (GXL)	VENC Input	TMDS Output

 S905D (GXL)	VENC Input	TMDS Output

 S912 (GXM)	VENC Input	TMDS Output

 S905X2 (G12A)	VENC Input	TMDS Output

 S905Y2 (G12A)	VENC Input	TMDS Output

 S905D2 (G12A)	VENC Input	TMDS Output

Example: