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Commit b1f01e48 authored by Shun-Chih Yu's avatar Shun-Chih Yu Committed by Vinod Koul
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dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC 



MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.

There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users to issue
dma requests onto the CQDMA simultaneously.

Signed-off-by: default avatarShun-Chih Yu <shun-chih.yu@mediatek.com>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 65102238

drivers/dma/mediatek/Kconfig

+13 −0
Original line number Diff line number Diff line
@@ -11,3 +11,16 @@ config MTK_HSDMA 
	  This controller provides the channels which is dedicated to

	  memory-to-memory transfer to offload from CPU through ring-

	  based descriptor management.



config MTK_CQDMA

	tristate "MediaTek Command-Queue DMA controller support"

	depends on ARCH_MEDIATEK || COMPILE_TEST

	select DMA_ENGINE

	select DMA_VIRTUAL_CHANNELS

	select ASYNC_TX_ENABLE_CHANNEL_SWITCH

	help

	  Enable support for Command-Queue DMA controller on MediaTek

	  SoCs.



	  This controller provides the channels which is dedicated to

	  memory-to-memory transfer to offload from CPU.

drivers/dma/mediatek/Makefile

+1 −0
Original line number Diff line number Diff line 
obj-$(CONFIG_MTK_HSDMA) += mtk-hsdma.o

obj-$(CONFIG_MTK_CQDMA) += mtk-cqdma.o

drivers/dma/mediatek/mtk-cqdma.c

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File added.

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