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Commit b1e3fb2e authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: enable SDE RSC rev 4 on lahaina"

parents 223d9e79 d7ae7e47

display/lahaina-sde-display.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -162,7 +162,7 @@ 
};



&mdss_mdp {

	connectors = <&sde_dp &sde_wb &sde_dsi>;

	connectors = <&sde_dp &sde_wb &sde_dsi &sde_rscc>;

};



/* PHY TIMINGS REVISION YB */

display/lahaina-sde.dtsi

+14 −22
Original line number Diff line number Diff line
@@ -34,7 +34,6 @@ 
					460000000>;



		mmcx-supply = <&VDD_MMCX_LEVEL>;

		vdd-supply = <&disp_cc_mdss_core_gdsc>;



		/* interrupt config */

		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
@@ -244,8 +243,7 @@ 
		qcom,sde-secure-sid-mask = <0x4000821>;



		/* data and reg bus scale settings */

		interconnects =

			<&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>,

		interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>,

				<&mmss_noc MASTER_MDP1 &mc_virt SLAVE_EBI1>,

				<&gem_noc MASTER_APPSS_PROC

					&config_noc SLAVE_DISPLAY_CFG>;
@@ -302,15 +300,6 @@ 
				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};



			qcom,platform-supply-entry@1 {

				reg = <0>;

				qcom,supply-name = "vdd";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};

		};



		smmu_sde_unsec: qcom,smmu_sde_unsec_cb {
@@ -469,11 +458,10 @@ 
	sde_rscc: qcom,sde_rscc@af20000 {

		cell-index = <0>;

		compatible = "qcom,sde-rsc";

		status = "disabled";

		reg = <0xaf20000 0x3c50>,

		reg = <0xaf20000 0x4d68>,

			<0xaf30000 0x3fd4>;

		reg-names = "drv", "wrapper";

		qcom,sde-rsc-version = <3>;

		qcom,sde-rsc-version = <4>;



		qcom,sde-dram-channels = <2>;
@@ -482,10 +470,14 @@ 
			<&clock_dispcc DISP_CC_MDSS_NON_GDSC_AHB_CLK>,

			<&clock_dispcc DISP_CC_MDSS_RSCC_AHB_CLK>;

		clock-names = "vsync_clk", "gdsc_clk", "iface_clk";



		qcom,msm-bus,active-only;

		interconnects =

			<&gem_noc MASTER_APPSS_PROC

				&config_noc SLAVE_DISPLAY_CFG>;

		interconnect-names = "qcom,sde-reg-bus";

			<&mmss_noc MASTER_MDP0_DISP &gem_noc SLAVE_LLCC_DISP>,

			<&mmss_noc MASTER_MDP1_DISP &gem_noc SLAVE_LLCC_DISP>,

			<&mc_virt MASTER_LLCC_DISP &mc_virt SLAVE_EBI1_DISP>;

		interconnect-names = "qcom,sde-data-bus0", "qcom,sde-data-bus1",

				"qcom,sde-ebi-bus";

	};



	mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 {