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Commit b1ac6704 authored by Michał Mirosław's avatar Michał Mirosław Committed by Wolfram Sang
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i2c: at91: fix clk_offset for sama5d2 



In SAMA5D2 datasheet, TWIHS_CWGR register rescription mentions clock
offset of 3 cycles (compared to 4 in eg. SAMA5D3).

Cc: stable@vger.kernel.org # 5.2.x
[needs applying to i2c-at91.c instead for earlier kernels]
Fixes: 0ef6f321 ("i2c: at91: add support for new alternative command mode")
Signed-off-by: default avatarMichał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: default avatarLudovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent d12e3aae

drivers/i2c/busses/i2c-at91-core.c

+1 −1
Original line number Diff line number Diff line
@@ -142,7 +142,7 @@ static struct at91_twi_pdata sama5d4_config = { 


static struct at91_twi_pdata sama5d2_config = {

	.clk_max_div = 7,

	.clk_offset = 4,

	.clk_offset = 3,

	.has_unre_flag = true,

	.has_alt_cmd = true,

	.has_hold_field = true,