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Commit b130b0d5 authored by Suganath prabu Subramani's avatar Suganath prabu Subramani Committed by Martin K. Petersen
Browse files

mpt3sas: Added support for high port count HBA variants. 



Updated hardware description headers with MPI v2.6 and
mpt3sas_pci_table[] with vendor_ids, device_ids of Cutlass and Intruder
HBA which have support for 4 ports.

Signed-off-by: default avatarSuganath prabu Subramani <suganath-prabu.subramani@avagotech.com>
Signed-off-by: default avatarChaitra P B <chaitra.basappa@avagotech.com>
Reviewed-by: default avatarTomas Henzl <thenzl@redhat.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 8038e645

drivers/scsi/mpt3sas/mpi/mpi2.h

+70 −8
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2000-2014 LSI Corporation.

 * Copyright 2000-2015 Avago Technologies.  All rights reserved.

 *

 *

 *          Name:  mpi2.h
@@ -8,7 +8,7 @@ 
 *                 scatter/gather formats.

 * Creation Date:  June 21, 2006

 *

 * mpi2.h Version:  02.00.35

 * mpi2.h Version:  02.00.37

 *

 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25

 *       prefix are for use only on MPI v2.5 products, and must not be used
@@ -92,6 +92,12 @@ 
 * 12-05-13  02.00.33  Bumped MPI2_HEADER_VERSION_UNIT.

 * 01-08-14  02.00.34  Bumped MPI2_HEADER_VERSION_UNIT

 * 06-13-14  02.00.35  Bumped MPI2_HEADER_VERSION_UNIT.

 * 11-18-14  02.00.36  Updated copyright information.

 *                     Bumped MPI2_HEADER_VERSION_UNIT.

 * 03-xx-15  02.00.37  Bumped MPI2_HEADER_VERSION_UNIT.

 *                     Added Scratchpad registers to

 *                     MPI2_SYSTEM_INTERFACE_REGS.

 *                     Added MPI2_DIAG_SBR_RELOAD.

 * --------------------------------------------------------------------------

 */
@@ -124,6 +130,12 @@ 
					MPI25_VERSION_MINOR)

#define MPI2_VERSION_02_05                  (0x0205)



/*minor version for MPI v2.6 compatible products */

#define MPI26_VERSION_MINOR		    (0x06)

#define MPI26_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \

					MPI26_VERSION_MINOR)

#define MPI2_VERSION_02_06		    (0x0206)



/*Unit and Dev versioning for this MPI header set */

#define MPI2_HEADER_VERSION_UNIT            (0x23)

#define MPI2_HEADER_VERSION_DEV             (0x00)
@@ -179,10 +191,12 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS { 
	U32 HCBSize;		/*0x74 */

	U32 HCBAddressLow;	/*0x78 */

	U32 HCBAddressHigh;	/*0x7C */

	U32 Reserved6[16];	/*0x80 */

	U32 Reserved6[12];	/*0x80 */

	U32 Scratchpad[4];	/*0xB0 */

	U32 RequestDescriptorPostLow;	/*0xC0 */

	U32 RequestDescriptorPostHigh;	/*0xC4 */

	U32 Reserved7[14];	/*0xC8 */

	U32 AtomicRequestDescriptorPost;/*0xC8 */

	U32 Reserved7[13];	/*0xCC */

} MPI2_SYSTEM_INTERFACE_REGS,

	*PTR_MPI2_SYSTEM_INTERFACE_REGS,

	Mpi2SystemInterfaceRegs_t,
@@ -224,6 +238,8 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS { 
 */

#define MPI2_HOST_DIAGNOSTIC_OFFSET             (0x00000008)



#define MPI2_DIAG_SBR_RELOAD                    (0x00002000)



#define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK       (0x00001800)

#define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT    (0x00000000)

#define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW       (0x00000800)
@@ -298,10 +314,19 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS { 
#define MPI2_HCB_ADDRESS_HIGH_OFFSET            (0x0000007C)



/*

 *Offsets for the Request Queue

 *Offsets for the Scratchpad registers

 */

#define MPI26_SCRATCHPAD0_OFFSET                (0x000000B0)

#define MPI26_SCRATCHPAD1_OFFSET                (0x000000B4)

#define MPI26_SCRATCHPAD2_OFFSET                (0x000000B8)

#define MPI26_SCRATCHPAD3_OFFSET                (0x000000BC)



/*

 *Offsets for the Request Descriptor Post Queue

 */

#define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET     (0x000000C0)

#define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET    (0x000000C4)

#define MPI26_ATOMIC_REQUEST_DESCRIPTOR_POST_OFFSET (0x000000C8)



/*Hard Reset delay timings */

#define MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC     (50000)
@@ -329,7 +354,8 @@ typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR { 
	*pMpi2DefaultRequestDescriptor_t;



/*defines for the RequestFlags field */

#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK               (0x0E)

#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK               (0x1E)

#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_RSHIFT             (1)

#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO                 (0x00)

#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET             (0x02)

#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY           (0x06)
@@ -408,6 +434,33 @@ typedef union _MPI2_REQUEST_DESCRIPTOR_UNION { 
	Mpi2RequestDescriptorUnion_t,

	*pMpi2RequestDescriptorUnion_t;



/*Atomic Request Descriptors */



/*

 * All Atomic Request Descriptors have the same format, so the following

 * structure is used for all Atomic Request Descriptors:

 *      Atomic Default Request Descriptor

 *      Atomic High Priority Request Descriptor

 *      Atomic SCSI IO Request Descriptor

 *      Atomic SCSI Target Request Descriptor

 *      Atomic RAID Accelerator Request Descriptor

 *      Atomic Fast Path SCSI IO Request Descriptor

 */



/*Atomic Request Descriptor */

typedef struct _MPI26_ATOMIC_REQUEST_DESCRIPTOR {

	U8 RequestFlags;	/* 0x00 */

	U8 MSIxIndex;		/* 0x01 */

	U16 SMID;		/* 0x02 */

} MPI26_ATOMIC_REQUEST_DESCRIPTOR,

	*PTR_MPI26_ATOMIC_REQUEST_DESCRIPTOR,

	Mpi26AtomicRequestDescriptor_t,

	*pMpi26AtomicRequestDescriptor_t;



/*for the RequestFlags field, use the same

 *defines as MPI2_DEFAULT_REQUEST_DESCRIPTOR

 */



/*Reply Descriptors */



/*Default Reply Descriptor */
@@ -548,6 +601,7 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION { 
#define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR      (0x18)

#define MPI2_FUNCTION_SMP_PASSTHROUGH               (0x1A)

#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL           (0x1B)

#define MPI2_FUNCTION_IO_UNIT_CONTROL               (0x1B)

#define MPI2_FUNCTION_SATA_PASSTHROUGH              (0x1C)

#define MPI2_FUNCTION_DIAG_BUFFER_POST              (0x1D)

#define MPI2_FUNCTION_DIAG_RELEASE                  (0x1E)
@@ -587,6 +641,7 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION { 
#define MPI2_IOCSTATUS_INVALID_FIELD                (0x0007)

#define MPI2_IOCSTATUS_INVALID_STATE                (0x0008)

#define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED       (0x0009)

#define MPI2_IOCSTATUS_INSUFFICIENT_POWER           (0x000A)



/****************************************************************************

* Config IOCStatus values
@@ -1045,7 +1100,7 @@ typedef union _MPI2_IEEE_SGE_CHAIN_UNION { 
	Mpi2IeeeSgeChainUnion_t,

	*pMpi2IeeeSgeChainUnion_t;



/*MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */

/*MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 and later */

typedef struct _MPI25_IEEE_SGE_CHAIN64 {

	U64 Address;

	U32 Length;
@@ -1098,6 +1153,11 @@ typedef union _MPI25_SGE_IO_UNION { 
#define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT      (0x00)

#define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT       (0x80)



/*Next Segment Format */



#define MPI26_IEEE_SGE_FLAGS_NSF_MASK           (0x1C)

#define MPI26_IEEE_SGE_FLAGS_NSF_MPI_IEEE       (0x00)



/*Data Location Address Space */



#define MPI2_IEEE_SGE_FLAGS_ADDR_MASK           (0x03)
@@ -1108,6 +1168,7 @@ typedef union _MPI25_SGE_IO_UNION { 
#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR   (0x03)

#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR \

	 (MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR)

#define MPI26_IEEE_SGE_FLAGS_IOCCTL_ADDR        (0x02)



/****************************************************************************

* IEEE SGE operation Macros
@@ -1166,6 +1227,7 @@ typedef union _MPI2_SGE_IO_UNION { 
#define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE          (0x00)

#define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE          (0x04)

#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE          (0x08)

#define MPI26_SGLFLAGS_IOCPLB_ADDRESS_SPACE         (0x08)

#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE       (0x0C)

/*values for SGL Type subfield */

#define MPI2_SGLFLAGS_SGL_TYPE_MASK                 (0x03)

drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h

+113 −11
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2000-2014 LSI Corporation.

 * Copyright 2000-2015 Avago Technologies.  All rights reserved.

 *

 *

 *          Name:  mpi2_cnfg.h

 *         Title:  MPI Configuration messages and pages

 * Creation Date:  November 10, 2006

 *

 *   mpi2_cnfg.h Version:  02.00.29

 *   mpi2_cnfg.h Version:  02.00.31

 *

 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25

 *       prefix are for use only on MPI v2.5 products, and must not be used
@@ -178,7 +178,12 @@ 
 * 01-08-14  02.00.28  Added more defines for the BiosOptions field of

 *		       MPI2_CONFIG_PAGE_BIOS_1.

 * 06-13-14  02.00.29  Added SSUTimeout field to MPI2_CONFIG_PAGE_BIOS_1, and

 *		       more defines for the BiosOptions field..

 *                     more defines for the BiosOptions field.

 * 11-18-14  02.00.30  Updated copyright information.

 *                     Added MPI2_BIOSPAGE1_OPTIONS_ADVANCED_CONFIG.

 *                     Added AdapterOrderAux fields to BIOS Page 3.

 * 03-xx-15  02.00.31  Updated for MPI v2.6.

 *                     Added new SAS Phy Event codes

 * --------------------------------------------------------------------------

 */
@@ -355,7 +360,6 @@ typedef union _MPI2_CONFIG_EXT_PAGE_HEADER_UNION { 
#define MPI2_ETHERNET_PGAD_IF_NUMBER_MASK           (0x000000FF)







/****************************************************************************

*  Configuration messages

****************************************************************************/
@@ -457,8 +461,17 @@ typedef struct _MPI2_CONFIG_REPLY { 
#define MPI25_MFGPAGE_DEVID_SAS3108_5               (0x0094)

#define MPI25_MFGPAGE_DEVID_SAS3108_6               (0x0095)







/* MPI v2.6 SAS Products */

#define MPI26_MFGPAGE_DEVID_SAS3216                 (0x00C9)

#define MPI26_MFGPAGE_DEVID_SAS3224                 (0x00C4)

#define MPI26_MFGPAGE_DEVID_SAS3316_1               (0x00C5)

#define MPI26_MFGPAGE_DEVID_SAS3316_2               (0x00C6)

#define MPI26_MFGPAGE_DEVID_SAS3316_3               (0x00C7)

#define MPI26_MFGPAGE_DEVID_SAS3316_4               (0x00C8)

#define MPI26_MFGPAGE_DEVID_SAS3324_1               (0x00C0)

#define MPI26_MFGPAGE_DEVID_SAS3324_2               (0x00C1)

#define MPI26_MFGPAGE_DEVID_SAS3324_3               (0x00C2)

#define MPI26_MFGPAGE_DEVID_SAS3324_4               (0x00C3)



/*Manufacturing Page 0 */
@@ -941,8 +954,8 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_7 { 
	U8

		BoardTemperatureUnits;                  /*0x16 */

	U8                      Reserved3;              /*0x17 */

	U32			Reserved4;		/* 0x18 */

	U32			Reserved5;		/* 0x1C */

	U32			BoardPowerRequirement;	/*0x18 */

	U32			PCISlotPowerAllocation;	/*0x1C */

	U32			Reserved6;		/* 0x20 */

	U32			Reserved7;		/* 0x24 */

} MPI2_CONFIG_PAGE_IO_UNIT_7,
@@ -1151,6 +1164,62 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_10 { 
#define MPI2_IOUNITPAGE10_PAGEVERSION                   (0x01)





/* IO Unit Page 11 (for MPI v2.6 and later) */



typedef struct _MPI26_IOUNIT11_SPINUP_GROUP {

	U8          MaxTargetSpinup;            /* 0x00 */

	U8          SpinupDelay;                /* 0x01 */

	U8          SpinupFlags;                /* 0x02 */

	U8          Reserved1;                  /* 0x03 */

} MPI26_IOUNIT11_SPINUP_GROUP,

	*PTR_MPI26_IOUNIT11_SPINUP_GROUP,

	Mpi26IOUnit11SpinupGroup_t,

	*pMpi26IOUnit11SpinupGroup_t;



/* defines for IO Unit Page 11 SpinupFlags */

#define MPI26_IOUNITPAGE11_SPINUP_DISABLE_FLAG          (0x01)





/*

 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to

 * four and check the value returned for NumPhys at runtime.

 */

#ifndef MPI26_IOUNITPAGE11_PHY_MAX

#define MPI26_IOUNITPAGE11_PHY_MAX        (4)

#endif



typedef struct _MPI26_CONFIG_PAGE_IO_UNIT_11 {

	MPI2_CONFIG_PAGE_HEADER       Header;			       /*0x00 */

	U32                           Reserved1;                      /*0x04 */

	MPI26_IOUNIT11_SPINUP_GROUP   SpinupGroupParameters[4];       /*0x08 */

	U32                           Reserved2;                      /*0x18 */

	U32                           Reserved3;                      /*0x1C */

	U32                           Reserved4;                      /*0x20 */

	U8                            BootDeviceWaitTime;             /*0x24 */

	U8                            Reserved5;                      /*0x25 */

	U16                           Reserved6;                      /*0x26 */

	U8                            NumPhys;                        /*0x28 */

	U8                            PEInitialSpinupDelay;           /*0x29 */

	U8                            PEReplyDelay;                   /*0x2A */

	U8                            Flags;                          /*0x2B */

	U8			      PHY[MPI26_IOUNITPAGE11_PHY_MAX];/*0x2C */

} MPI26_CONFIG_PAGE_IO_UNIT_11,

	*PTR_MPI26_CONFIG_PAGE_IO_UNIT_11,

	Mpi26IOUnitPage11_t,

	*pMpi26IOUnitPage11_t;



#define MPI26_IOUNITPAGE11_PAGEVERSION                  (0x00)



/* defines for Flags field */

#define MPI26_IOUNITPAGE11_FLAGS_AUTO_PORTENABLE        (0x01)



/* defines for PHY field */

#define MPI26_IOUNITPAGE11_PHY_SPINUP_GROUP_MASK        (0x03)













/****************************************************************************

*  IOC Config Pages
@@ -1343,6 +1412,9 @@ typedef struct _MPI2_CONFIG_PAGE_BIOS_1 { 
#define MPI2_BIOSPAGE1_PAGEVERSION                      (0x07)



/*values for BIOS Page 1 BiosOptions field */

#define MPI2_BIOSPAGE1_OPTIONS_ADVANCED_CONFIG                  (0x00004000)



#define MPI2_BIOSPAGE1_OPTIONS_PNS_MASK                         (0x00003800)

#define MPI2_BIOSPAGE1_OPTIONS_PNS_MASK                         (0x00003800)

#define MPI2_BIOSPAGE1_OPTIONS_PNS_PBDHL                        (0x00000000)

#define MPI2_BIOSPAGE1_OPTIONS_PNS_ENCSLOSURE                   (0x00000800)
@@ -1492,6 +1564,8 @@ typedef struct _MPI2_CONFIG_PAGE_BIOS_2 { 


/*BIOS Page 3 */



#define MPI2_BIOSPAGE3_NUM_ADAPTER      (4)



typedef struct _MPI2_ADAPTER_INFO {

	U8      PciBusNumber;                        /*0x00 */

	U8      PciDeviceAndFunctionNumber;          /*0x01 */
@@ -1502,17 +1576,26 @@ typedef struct _MPI2_ADAPTER_INFO { 
#define MPI2_ADAPTER_INFO_FLAGS_EMBEDDED                (0x0001)

#define MPI2_ADAPTER_INFO_FLAGS_INIT_STATUS             (0x0002)



typedef struct _MPI2_ADAPTER_ORDER_AUX {

	U64     WWID;					/* 0x00 */

	U32     Reserved1;				/* 0x08 */

	U32     Reserved2;				/* 0x0C */

} MPI2_ADAPTER_ORDER_AUX, *PTR_MPI2_ADAPTER_ORDER_AUX,

	Mpi2AdapterOrderAux_t, *pMpi2AdapterOrderAux_t;





typedef struct _MPI2_CONFIG_PAGE_BIOS_3 {

	MPI2_CONFIG_PAGE_HEADER Header;              /*0x00 */

	U32                     GlobalFlags;         /*0x04 */

	U32                     BiosVersion;         /*0x08 */

	MPI2_ADAPTER_INFO       AdapterOrder[4];     /*0x0C */

	MPI2_ADAPTER_INFO       AdapterOrder[MPI2_BIOSPAGE3_NUM_ADAPTER];

	U32                     Reserved1;           /*0x1C */

	MPI2_ADAPTER_ORDER_AUX  AdapterOrderAux[MPI2_BIOSPAGE3_NUM_ADAPTER];

} MPI2_CONFIG_PAGE_BIOS_3,

	*PTR_MPI2_CONFIG_PAGE_BIOS_3,

	Mpi2BiosPage3_t, *pMpi2BiosPage3_t;



#define MPI2_BIOSPAGE3_PAGEVERSION                      (0x00)

#define MPI2_BIOSPAGE3_PAGEVERSION                      (0x01)



/*values for BIOS Page 3 GlobalFlags */

#define MPI2_BIOSPAGE3_FLAGS_PAUSE_ON_ERROR             (0x00000002)
@@ -2006,6 +2089,8 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_0 { 
#define MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG          (0x01)



/*values for SAS IO Unit Page 0 PhyFlags */

#define MPI2_SASIOUNIT0_PHYFLAGS_INIT_PERSIST_CONNECT       (0x40)

#define MPI2_SASIOUNIT0_PHYFLAGS_TARG_PERSIST_CONNECT       (0x20)

#define MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED             (0x10)

#define MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED               (0x08)
@@ -2108,6 +2193,7 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 { 
#define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION                   (0x0001)



/*values for SAS IO Unit Page 1 AdditionalControlFlags */

#define MPI2_SASIOUNIT1_ACONTROL_DA_PERSIST_CONNECT                 (0x0100)

#define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL          (0x0080)

#define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION    (0x0040)

#define MPI2_SASIOUNIT1_ACONTROL_INVALID_TOPOLOGY_CORRECTION        (0x0020)
@@ -2125,6 +2211,8 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 { 
#define MPI2_SASIOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG                 (0x01)



/*values for SAS IO Unit Page 1 PhyFlags */

#define MPI2_SASIOUNIT1_PHYFLAGS_INIT_PERSIST_CONNECT               (0x40)

#define MPI2_SASIOUNIT1_PHYFLAGS_TARG_PERSIST_CONNECT               (0x20)

#define MPI2_SASIOUNIT1_PHYFLAGS_ZONING_ENABLE                      (0x10)

#define MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE                        (0x08)
@@ -2144,7 +2232,7 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 { 
 *SAS IO Unit Page 1 ControllerPhyDeviceInfo values */





/*SAS IO Unit Page 4 */

/*SAS IO Unit Page 4 (for MPI v2.5 and earlier) */



typedef struct _MPI2_SAS_IOUNIT4_SPINUP_GROUP {

	U8          MaxTargetSpinup;            /*0x00 */
@@ -2715,6 +2803,7 @@ typedef struct _MPI2_CONFIG_PAGE_SAS_DEV_0 { 
#define MPI2_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED           (0x0020)

#define MPI2_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED           (0x0010)

#define MPI2_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH         (0x0008)

#define MPI2_SAS_DEVICE0_FLAGS_PERSIST_CAPABLE              (0x0004)

#define MPI2_SAS_DEVICE0_FLAGS_ENCL_LEVEL_VALID             (0x0002)

#define MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT               (0x0001)
@@ -2922,6 +3011,19 @@ typedef struct _MPI2_SASPHY3_PHY_EVENT_CONFIG { 
#define MPI2_SASPHY3_EVENT_CODE_MISALIGNED_MUX_PRIMITIVE    (0xD1)

#define MPI2_SASPHY3_EVENT_CODE_RX_AIP                      (0xD2)



/*Following codes are product specific and in MPI v2.6 and later */

#define MPI2_SASPHY3_EVENT_CODE_LCARB_WAIT_TIME		    (0xD3)

#define MPI2_SASPHY3_EVENT_CODE_RCVD_CONN_RESP_WAIT_TIME    (0xD4)

#define MPI2_SASPHY3_EVENT_CODE_LCCONN_TIME	            (0xD5)

#define MPI2_SASPHY3_EVENT_CODE_SSP_TX_START_TRANSMIT	    (0xD6)

#define MPI2_SASPHY3_EVENT_CODE_SATA_TX_START	            (0xD7)

#define MPI2_SASPHY3_EVENT_CODE_SMP_TX_START_TRANSMT	    (0xD8)

#define MPI2_SASPHY3_EVENT_CODE_TX_SMP_BREAK_CONN	    (0xD9)

#define MPI2_SASPHY3_EVENT_CODE_SSP_RX_START_RECEIVE	    (0xDA)

#define MPI2_SASPHY3_EVENT_CODE_SATA_RX_START_RECEIVE	    (0xDB)

#define MPI2_SASPHY3_EVENT_CODE_SMP_RX_START_RECEIVE	    (0xDC)





/*values for the CounterType field */

#define MPI2_SASPHY3_COUNTER_TYPE_WRAPPING                  (0x00)

#define MPI2_SASPHY3_COUNTER_TYPE_SATURATING                (0x01)

drivers/scsi/mpt3sas/mpi/mpi2_init.h

+15 −6
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2000-2014 LSI Corporation.

 * Copyright 2000-2015 Avago Technologies.  All rights reserved.

 *

 *

 *          Name:  mpi2_init.h

 *         Title:  MPI SCSI initiator mode messages and structures

 * Creation Date:  June 23, 2006

 *

 * mpi2_init.h Version:  02.00.15

 * mpi2_init.h Version:  02.00.17

 *

 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25

 *       prefix are for use only on MPI v2.5 products, and must not be used
@@ -46,6 +46,10 @@ 
 * 07-10-12  02.00.14  Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.

 * 04-09-13  02.00.15  Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY,

 *                     replacing the Reserved4 field.

 * 11-18-14  02.00.16  Updated copyright information.

 * 03-xx-15  02.00.17  Updated for MPI v2.6.

 *                     Added MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF and

 *                     MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF.

 * --------------------------------------------------------------------------

 */
@@ -128,6 +132,7 @@ typedef struct _MPI2_SCSI_IO_REQUEST { 
#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR      (0x04)

#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR      (0x08)

#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR   (0x0C)

#define MPI26_SCSIIO_MSGFLAGS_IOCCTL_SENSE_ADDR     (0x08)



/*SCSI IO SGLFlags bits */
@@ -228,7 +233,7 @@ typedef union _MPI25_SCSI_IO_CDB_UNION { 
} MPI25_SCSI_IO_CDB_UNION, *PTR_MPI25_SCSI_IO_CDB_UNION,

	Mpi25ScsiIoCdb_t, *pMpi25ScsiIoCdb_t;



/*MPI v2.5 SCSI IO Request Message */

/*MPI v2.5/2.6 SCSI IO Request Message */

typedef struct _MPI25_SCSI_IO_REQUEST {

	U16 DevHandle;		/*0x00 */

	U8 ChainOffset;		/*0x02 */
@@ -306,8 +311,10 @@ typedef struct _MPI25_SCSI_IO_REQUEST { 
#define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH                (0x0000)

#define MPI25_SCSIIO_IOFLAGS_FAST_PATH                  (0x4000)



#define MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH         (0x2000)

#define MPI25_SCSIIO_IOFLAGS_LARGE_CDB                  (0x1000)

#define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL              (0x0800)

#define MPI26_SCSIIO_IOFLAGS_PORT_REQUEST               (0x0400)

#define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK             (0x01FF)



/*MPI v2.5 defines for the EEDPFlags bits */
@@ -512,6 +519,7 @@ typedef struct _MPI2_SEP_REQUEST { 
#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS       (0x01)



/*SlotStatus defines */

#define MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF                 (0x00080000)

#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE          (0x00040000)

#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST        (0x00020000)

#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED         (0x00000200)
@@ -547,6 +555,7 @@ typedef struct _MPI2_SEP_REPLY { 
	Mpi2SepReply_t, *pMpi2SepReply_t;



/*SlotStatus defines */

#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF               (0x00080000)

#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY          (0x00040000)

#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST      (0x00020000)

#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED       (0x00000200)

drivers/scsi/mpt3sas/mpi/mpi2_ioc.h

+109 −8

File changed.

Preview size limit exceeded, changes collapsed.

drivers/scsi/mpt3sas/mpi/mpi2_raid.h

+3 −2
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2000-2014 LSI Corporation.

 * Copyright 2000-2014 Avago Technologies.  All rights reserved.

 *

 *

 *          Name:  mpi2_raid.h

 *         Title:  MPI Integrated RAID messages and structures

 * Creation Date:  April 26, 2007

 *

 *   mpi2_raid.h Version:  02.00.10

 *   mpi2_raid.h Version:  02.00.11

 *

 * Version History

 * ---------------
@@ -31,6 +31,7 @@ 
 * 07-26-12  02.00.09  Added ElapsedSeconds field to MPI2_RAID_VOL_INDICATOR.

 *                     Added MPI2_RAID_VOL_FLAGS_ELAPSED_SECONDS_VALID define.

 * 04-17-13  02.00.10  Added MPI25_RAID_ACTION_ADATA_ALLOW_PI.

 * 11-18-14  02.00.11  Updated copyright information.

 * --------------------------------------------------------------------------

 */