Loading qcom/lahaina-coresight.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -3171,6 +3171,10 @@ clocks = <&clock_aop QDSS_CLK>; clock-names = "apb_pclk"; qcom,cti-gpio-trigout = <0>; pinctrl-names = "cti-trigout-pctrl"; pinctrl-0 = <&trigout_a>; }; cti3: cti@6013000 { Loading qcom/lahaina-pinctrl.dtsi +13 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,19 @@ }; }; trigout_a: trigout_a { mux { pins = "gpio14"; function = "qdss_cti"; }; config { pins = "gpio14"; drive-strength = <2>; bias-disable; }; }; qupv3_se3_2uart_pins: qupv3_se3_2uart_pins { qupv3_se3_2uart_active: qupv3_se3_2uart_active { mux { Loading Loading
qcom/lahaina-coresight.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -3171,6 +3171,10 @@ clocks = <&clock_aop QDSS_CLK>; clock-names = "apb_pclk"; qcom,cti-gpio-trigout = <0>; pinctrl-names = "cti-trigout-pctrl"; pinctrl-0 = <&trigout_a>; }; cti3: cti@6013000 { Loading
qcom/lahaina-pinctrl.dtsi +13 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,19 @@ }; }; trigout_a: trigout_a { mux { pins = "gpio14"; function = "qdss_cti"; }; config { pins = "gpio14"; drive-strength = <2>; bias-disable; }; }; qupv3_se3_2uart_pins: qupv3_se3_2uart_pins { qupv3_se3_2uart_active: qupv3_se3_2uart_active { mux { Loading