Loading arch/parisc/kernel/pci.c +0 −11 Original line number Diff line number Diff line Loading @@ -34,17 +34,6 @@ #define DBG_RES(x...) #endif /* To be used as: mdelay(pci_post_reset_delay); * * post_reset is the time the kernel should stall to prevent anyone from * accessing the PCI bus once #RESET is de-asserted. * PCI spec somewhere says 1 second but with multi-PCI bus systems, * this makes the boot time much longer than necessary. * 20ms seems to work for all the HP PCI implementations to date. * * #define pci_post_reset_delay 50 */ struct pci_port_ops *pci_port __ro_after_init; struct pci_bios_ops *pci_bios __ro_after_init; Loading Loading
arch/parisc/kernel/pci.c +0 −11 Original line number Diff line number Diff line Loading @@ -34,17 +34,6 @@ #define DBG_RES(x...) #endif /* To be used as: mdelay(pci_post_reset_delay); * * post_reset is the time the kernel should stall to prevent anyone from * accessing the PCI bus once #RESET is de-asserted. * PCI spec somewhere says 1 second but with multi-PCI bus systems, * this makes the boot time much longer than necessary. * 20ms seems to work for all the HP PCI implementations to date. * * #define pci_post_reset_delay 50 */ struct pci_port_ops *pci_port __ro_after_init; struct pci_bios_ops *pci_bios __ro_after_init; Loading