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Commit b08df2e6 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "disp: msm: sde: add rev check for LITO target"

parents a8d58b7c f0bc6e46

msm/sde/sde_hw_catalog.c

+31 −0
Original line number Diff line number Diff line
@@ -3875,6 +3875,37 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) 
		sde_cfg->true_inline_prefill_lines_nv12 = 32;

		sde_cfg->true_inline_prefill_lines = 48;

		sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_0;

	} else if (IS_SAIPAN_TARGET(hw_rev)) {

		sde_cfg->has_cwb_support = true;

		sde_cfg->has_wb_ubwc = true;

		sde_cfg->has_qsync = true;

		sde_cfg->perf.min_prefill_lines = 24;

		sde_cfg->vbif_qos_nlvl = 8;

		sde_cfg->ts_prefill_rev = 2;

		sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0;

		sde_cfg->delay_prg_fetch_start = true;

		sde_cfg->sui_ns_allowed = true;

		sde_cfg->sui_misr_supported = true;

		sde_cfg->sui_block_xin_mask = 0xE71;

		sde_cfg->has_sui_blendstage = true;

		sde_cfg->has_qos_fl_nocalc = true;

		sde_cfg->has_3d_merge_reset = true;

		clear_bit(MDSS_INTR_AD4_0_INTR, sde_cfg->mdss_irqs);

		clear_bit(MDSS_INTR_AD4_1_INTR, sde_cfg->mdss_irqs);

		sde_cfg->has_hdr = true;

		sde_cfg->has_hdr_plus = true;

		set_bit(SDE_MDP_DHDR_MEMPOOL, &sde_cfg->mdp[0].features);

		sde_cfg->has_vig_p010 = true;

		sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_1_0_0;

		sde_cfg->true_inline_dwnscale_rt_num =

			MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_NUMERATOR;

		sde_cfg->true_inline_dwnscale_rt_denom =

			MAX_DOWNSCALE_RATIO_INLINE_ROT_RT_DENOMINATOR;

		sde_cfg->true_inline_dwnscale_nrt =

			MAX_DOWNSCALE_RATIO_INLINE_ROT_NRT_DEFAULT;

		sde_cfg->true_inline_prefill_fudge_lines = 2;

		sde_cfg->true_inline_prefill_lines_nv12 = 32;

		sde_cfg->true_inline_prefill_lines = 48;

	} else {

		SDE_ERROR("unsupported chipset id:%X\n", hw_rev);

		sde_cfg->perf.min_prefill_lines = 0xffff;

msm/sde/sde_hw_catalog.h

+2 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ 
#define SDE_HW_VER_520	SDE_HW_VER(5, 2, 0) /* sdmmagpie v1.0 */

#define SDE_HW_VER_530	SDE_HW_VER(5, 3, 0) /* sm6150 v1.0 */

#define SDE_HW_VER_600	SDE_HW_VER(6, 0, 0) /* kona */

#define SDE_HW_VER_610	SDE_HW_VER(6, 1, 0) /* sm7250 */



#define IS_MSM8996_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_170)

#define IS_MSM8998_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_300)
@@ -60,6 +61,7 @@ 
#define IS_SDMMAGPIE_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_520)

#define IS_SM6150_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_530)

#define IS_KONA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_600)

#define IS_SAIPAN_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_610)



#define SDE_HW_BLK_NAME_LEN	16

msm/sde/sde_hw_lm.c

+2 −1
Original line number Diff line number Diff line
@@ -285,7 +285,8 @@ static void _setup_mixer_ops(struct sde_mdss_cfg *m, 
			IS_SDMSHRIKE_TARGET(m->hwversion) ||

			IS_SM6150_TARGET(m->hwversion) ||

			IS_SDMMAGPIE_TARGET(m->hwversion) ||

			IS_KONA_TARGET(m->hwversion))

			IS_KONA_TARGET(m->hwversion) ||

			IS_SAIPAN_TARGET(m->hwversion))

		ops->setup_blend_config = sde_hw_lm_setup_blend_config_sdm845;

	else

		ops->setup_blend_config = sde_hw_lm_setup_blend_config;

msm/sde_dbg.c

+1 −1
Original line number Diff line number Diff line
@@ -4428,7 +4428,7 @@ void sde_dbg_init_dbg_buses(u32 hwversion) 
				ARRAY_SIZE(vbif_dbg_bus_msm8998);

		dbg->dbgbus_dsi.entries = NULL;

		dbg->dbgbus_dsi.size = 0;

	} else if (IS_KONA_TARGET(hwversion)) {

	} else if (IS_KONA_TARGET(hwversion) || IS_SAIPAN_TARGET(hwversion)) {

		dbg->dbgbus_sde.entries = dbg_bus_sde_kona;

		dbg->dbgbus_sde.cmn.entries_size =

				ARRAY_SIZE(dbg_bus_sde_kona);