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Commit afc0255c authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
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drm/amd/powerplay: enable clock stretch feature on Vega10.



Correctly calculate CKSVidOffset

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2d5f5f94
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+7 −5
Original line number Diff line number Diff line
@@ -123,6 +123,9 @@ static void vega10_set_default_registry_data(struct pp_hwmgr *hwmgr)
		data->registry_data.enable_tdc_limit_feature = 1;
	}

	data->registry_data.clock_stretcher_support =
			hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK ? true : false;

	data->registry_data.disable_water_mark = 0;

	data->registry_data.fan_control_support = 1;
@@ -2045,10 +2048,10 @@ static int vega10_populate_clock_stretcher_table(struct pp_hwmgr *hwmgr)
			table_info->vdd_dep_on_sclk;
	uint32_t i;

	for (i = 0; dep_table->count; i++) {
	for (i = 0; i < dep_table->count; i++) {
		pp_table->CksEnable[i] = dep_table->entries[i].cks_enable;
		pp_table->CksVidOffset[i] = convert_to_vid(
				dep_table->entries[i].cks_voffset);
		pp_table->CksVidOffset[i] = (uint8_t)(dep_table->entries[i].cks_voffset
				* VOLTAGE_VID_OFFSET_SCALE2 / VOLTAGE_VID_OFFSET_SCALE1);
	}

	return 0;
@@ -2380,8 +2383,7 @@ static int vega10_init_smc_table(struct pp_hwmgr *hwmgr)
			"Failed to initialize UVD Level!",
			return result);

	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
			PHM_PlatformCaps_ClockStretcher)) {
	if (data->registry_data.clock_stretcher_support) {
		result = vega10_populate_clock_stretcher_table(hwmgr);
		PP_ASSERT_WITH_CODE(!result,
				"Failed to populate Clock Stretcher Table!",