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Commit afbaade3 authored by Paul Bolle's avatar Paul Bolle Committed by Greg Kroah-Hartman
Browse files

delete seven tty headers



Commit 51c9d654 ("Staging: delete tty
drivers") left seven headers unused: nothing in the tree includes them
anymore. Two of those headers were still exported, but since nothing in
the kernel actually uses the things those two headers provide, that
seems pointless. Delete these seven tty headers too.

Signed-off-by: default avatarPaul Bolle <pebolle@tiscali.nl>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jiri Slaby <jslaby@suse.cz>
Acked-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent cfaf0251
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@@ -84,7 +84,6 @@ header-y += capability.h
header-y += capi.h
header-y += cciss_defs.h
header-y += cciss_ioctl.h
header-y += cdk.h
header-y += cdrom.h
header-y += cgroupstats.h
header-y += chio.h
@@ -93,7 +92,6 @@ header-y += cn_proc.h
header-y += coda.h
header-y += coda_psdev.h
header-y += coff.h
header-y += comstats.h
header-y += connector.h
header-y += const.h
header-y += cramfs_fs.h

include/linux/cd1400.h

deleted100644 → 0
+0 −292
Original line number Diff line number Diff line
/*****************************************************************************/

/*
 *	cd1400.h  -- cd1400 UART hardware info.
 *
 *	Copyright (C) 1996-1998  Stallion Technologies
 *	Copyright (C) 1994-1996  Greg Ungerer.
 *
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License as published by
 *	the Free Software Foundation; either version 2 of the License, or
 *	(at your option) any later version.
 *
 *	This program is distributed in the hope that it will be useful,
 *	but WITHOUT ANY WARRANTY; without even the implied warranty of
 *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *	GNU General Public License for more details.
 *
 *	You should have received a copy of the GNU General Public License
 *	along with this program; if not, write to the Free Software
 *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

/*****************************************************************************/
#ifndef	_CD1400_H
#define	_CD1400_H
/*****************************************************************************/

/*
 *	Define the number of async ports per cd1400 uart chip.
 */
#define	CD1400_PORTS		4

/*
 *	Define the cd1400 uarts internal FIFO sizes.
 */
#define	CD1400_TXFIFOSIZE	12
#define	CD1400_RXFIFOSIZE	12

/*
 *	Local RX FIFO thresh hold level. Also define the RTS thresh hold
 *	based on the RX thresh hold.
 */
#define	FIFO_RXTHRESHOLD	6
#define	FIFO_RTSTHRESHOLD	7

/*****************************************************************************/

/*
 *	Define the cd1400 register addresses. These are all the valid
 *	registers with the cd1400. Some are global, some virtual, some
 *	per port.
 */
#define	GFRCR		0x40
#define	CAR		0x68
#define	GCR		0x4b
#define	SVRR		0x67
#define	RICR		0x44
#define	TICR		0x45
#define	MICR		0x46
#define	RIR		0x6b
#define	TIR		0x6a
#define	MIR		0x69
#define	PPR		0x7e

#define	RIVR		0x43
#define	TIVR		0x42
#define	MIVR		0x41
#define	TDR		0x63
#define	RDSR		0x62
#define	MISR		0x4c
#define	EOSRR		0x60

#define	LIVR		0x18
#define	CCR		0x05
#define	SRER		0x06
#define	COR1		0x08
#define	COR2		0x09
#define	COR3		0x0a
#define	COR4		0x1e
#define	COR5		0x1f
#define	CCSR		0x0b
#define	RDCR		0x0e
#define	SCHR1		0x1a
#define	SCHR2		0x1b
#define	SCHR3		0x1c
#define	SCHR4		0x1d
#define	SCRL		0x22
#define	SCRH		0x23
#define	LNC		0x24
#define	MCOR1		0x15
#define	MCOR2		0x16
#define	RTPR		0x21
#define	MSVR1		0x6c
#define	MSVR2		0x6d
#define	PSVR		0x6f
#define	RBPR		0x78
#define	RCOR		0x7c
#define	TBPR		0x72
#define	TCOR		0x76

/*****************************************************************************/

/*
 *	Define the set of baud rate clock divisors.
 */
#define	CD1400_CLK0	8
#define	CD1400_CLK1	32
#define	CD1400_CLK2	128
#define	CD1400_CLK3	512
#define	CD1400_CLK4	2048

#define	CD1400_NUMCLKS	5

/*****************************************************************************/

/*
 *	Define the clock pre-scalar value to be a 5 ms clock. This should be
 *	OK for now. It would probably be better to make it 10 ms, but we
 *	can't fit that divisor into 8 bits!
 */
#define	PPR_SCALAR	244

/*****************************************************************************/

/*
 *	Define values used to set character size options.
 */
#define	COR1_CHL5	0x00
#define	COR1_CHL6	0x01
#define	COR1_CHL7	0x02
#define	COR1_CHL8	0x03

/*
 *	Define values used to set the number of stop bits.
 */
#define	COR1_STOP1	0x00
#define	COR1_STOP15	0x04
#define	COR1_STOP2	0x08

/*
 *	Define values used to set the parity scheme in use.
 */
#define	COR1_PARNONE	0x00
#define	COR1_PARFORCE	0x20
#define	COR1_PARENB	0x40
#define	COR1_PARIGNORE	0x10

#define	COR1_PARODD	0x80
#define	COR1_PAREVEN	0x00

#define	COR2_IXM	0x80
#define	COR2_TXIBE	0x40
#define	COR2_ETC	0x20
#define	COR2_LLM	0x10
#define	COR2_RLM	0x08
#define	COR2_RTSAO	0x04
#define	COR2_CTSAE	0x02

#define	COR3_SCDRNG	0x80
#define	COR3_SCD34	0x40
#define	COR3_FCT	0x20
#define	COR3_SCD12	0x10

/*
 *	Define values used by COR4.
 */
#define	COR4_BRKINT	0x08
#define	COR4_IGNBRK	0x18

/*****************************************************************************/

/*
 *	Define the modem control register values.
 *	Note that the actual hardware is a little different to the conventional
 *	pin names on the cd1400.
 */
#define	MSVR1_DTR	0x01
#define	MSVR1_DSR	0x10
#define	MSVR1_RI	0x20
#define	MSVR1_CTS	0x40
#define	MSVR1_DCD	0x80

#define	MSVR2_RTS	0x02
#define	MSVR2_DSR	0x10
#define	MSVR2_RI	0x20
#define	MSVR2_CTS	0x40
#define	MSVR2_DCD	0x80

#define	MCOR1_DCD	0x80
#define	MCOR1_CTS	0x40
#define	MCOR1_RI	0x20
#define	MCOR1_DSR	0x10

#define	MCOR2_DCD	0x80
#define	MCOR2_CTS	0x40
#define	MCOR2_RI	0x20
#define	MCOR2_DSR	0x10

/*****************************************************************************/

/*
 *	Define the bits used with the service (interrupt) enable register.
 */
#define	SRER_NNDT	0x01
#define	SRER_TXEMPTY	0x02
#define	SRER_TXDATA	0x04
#define	SRER_RXDATA	0x10
#define	SRER_MODEM	0x80

/*****************************************************************************/

/*
 *	Define operational commands for the command register.
 */
#define	CCR_RESET	0x80
#define	CCR_CORCHANGE	0x4e
#define	CCR_SENDCH	0x20
#define	CCR_CHANCTRL	0x10

#define	CCR_TXENABLE	(CCR_CHANCTRL | 0x08)
#define	CCR_TXDISABLE	(CCR_CHANCTRL | 0x04)
#define	CCR_RXENABLE	(CCR_CHANCTRL | 0x02)
#define	CCR_RXDISABLE	(CCR_CHANCTRL | 0x01)

#define	CCR_SENDSCHR1	(CCR_SENDCH | 0x01)
#define	CCR_SENDSCHR2	(CCR_SENDCH | 0x02)
#define	CCR_SENDSCHR3	(CCR_SENDCH | 0x03)
#define	CCR_SENDSCHR4	(CCR_SENDCH | 0x04)

#define	CCR_RESETCHAN	(CCR_RESET | 0x00)
#define	CCR_RESETFULL	(CCR_RESET | 0x01)
#define	CCR_TXFLUSHFIFO	(CCR_RESET | 0x02)

#define	CCR_MAXWAIT	10000

/*****************************************************************************/

/*
 *	Define the valid acknowledgement types (for hw ack cycle).
 */
#define	ACK_TYPMASK	0x07
#define	ACK_TYPTX	0x02
#define	ACK_TYPMDM	0x01
#define	ACK_TYPRXGOOD	0x03
#define	ACK_TYPRXBAD	0x07

#define	SVRR_RX		0x01
#define	SVRR_TX		0x02
#define	SVRR_MDM	0x04

#define	ST_OVERRUN	0x01
#define	ST_FRAMING	0x02
#define	ST_PARITY	0x04
#define	ST_BREAK	0x08
#define	ST_SCHAR1	0x10
#define	ST_SCHAR2	0x20
#define	ST_SCHAR3	0x30
#define	ST_SCHAR4	0x40
#define	ST_RANGE	0x70
#define	ST_SCHARMASK	0x70
#define	ST_TIMEOUT	0x80

#define	MISR_DCD	0x80
#define	MISR_CTS	0x40
#define	MISR_RI		0x20
#define	MISR_DSR	0x10

/*****************************************************************************/

/*
 *	Defines for the CCSR status register.
 */
#define	CCSR_RXENABLED	0x80
#define	CCSR_RXFLOWON	0x40
#define	CCSR_RXFLOWOFF	0x20
#define	CCSR_TXENABLED	0x08
#define	CCSR_TXFLOWON	0x04
#define	CCSR_TXFLOWOFF	0x02

/*****************************************************************************/

/*
 *	Define the embedded commands.
 */
#define	ETC_CMD		0x00
#define	ETC_STARTBREAK	0x81
#define	ETC_DELAY	0x82
#define	ETC_STOPBREAK	0x83

/*****************************************************************************/
#endif

include/linux/cdk.h

deleted100644 → 0
+0 −486
Original line number Diff line number Diff line
/*****************************************************************************/

/*
 *	cdk.h  -- CDK interface definitions.
 *
 *	Copyright (C) 1996-1998  Stallion Technologies
 *	Copyright (C) 1994-1996  Greg Ungerer.
 *
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License as published by
 *	the Free Software Foundation; either version 2 of the License, or
 *	(at your option) any later version.
 *
 *	This program is distributed in the hope that it will be useful,
 *	but WITHOUT ANY WARRANTY; without even the implied warranty of
 *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *	GNU General Public License for more details.
 *
 *	You should have received a copy of the GNU General Public License
 *	along with this program; if not, write to the Free Software
 *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

/*****************************************************************************/
#ifndef	_CDK_H
#define	_CDK_H
/*****************************************************************************/

#pragma	pack(2)

/*
 *	The following set of definitions is used to communicate with the
 *	shared memory interface of the Stallion intelligent multiport serial
 *	boards. The definitions in this file are taken directly from the
 *	document titled "Generic Stackable Interface, Downloader and
 *	Communications Development Kit".
 */

/*
 *	Define the set of important shared memory addresses. These are
 *	required to initialize the board and get things started. All of these
 *	addresses are relative to the start of the shared memory.
 */
#define	CDK_SIGADDR	0x200
#define	CDK_FEATADDR	0x280
#define	CDK_CDKADDR	0x300
#define	CDK_RDYADDR	0x262

#define	CDK_ALIVEMARKER	13

/*
 *	On hardware power up the ROMs located on the EasyConnection 8/64 will
 *	fill out the following signature information into shared memory. This
 *	way the host system can quickly determine that the board is present
 *	and is operational.
 */
typedef struct cdkecpsig {
	unsigned long	magic;
	unsigned short	romver;
	unsigned short	cputype;
	unsigned char	panelid[8];
} cdkecpsig_t;

#define	ECP_MAGIC	0x21504345

/*
 *	On hardware power up the ROMs located on the ONboard, Stallion and
 *	Brumbys will fill out the following signature information into shared
 *	memory. This way the host system can quickly determine that the board
 *	is present and is operational.
 */
typedef struct cdkonbsig {
	unsigned short	magic0;
	unsigned short	magic1;
	unsigned short	magic2;
	unsigned short	magic3;
	unsigned short	romver;
	unsigned short	memoff;
	unsigned short	memseg;
	unsigned short	amask0;
	unsigned short	pic;
	unsigned short	status;
	unsigned short	btype;
	unsigned short	clkticks;
	unsigned short	clkspeed;
	unsigned short	amask1;
	unsigned short	amask2;
} cdkonbsig_t;

#define	ONB_MAGIC0	0xf2a7
#define	ONB_MAGIC1	0xa149
#define	ONB_MAGIC2	0x6352
#define	ONB_MAGIC3	0xf121

/*
 *	Define the feature area structure. The feature area is the set of
 *	startup parameters used by the slave image when it starts executing.
 *	They allow for the specification of buffer sizes, debug trace, etc.
 */
typedef struct cdkfeature {
	unsigned long	debug;
	unsigned long	banner;
	unsigned long	etype;
	unsigned long	nrdevs;
	unsigned long	brdspec;
	unsigned long	txrqsize;
	unsigned long	rxrqsize;
	unsigned long	flags;
} cdkfeature_t;

#define	ETYP_DDK	0
#define	ETYP_CDK	1

/*
 *	Define the CDK header structure. This is the info that the slave
 *	environment sets up after it has been downloaded and started. It
 *	essentially provides a memory map for the shared memory interface.
 */
typedef struct cdkhdr {
	unsigned short	command;
	unsigned short	status;
	unsigned short	port;
	unsigned short	mode;
	unsigned long	cmd_buf[14];
	unsigned short	alive_cnt;
	unsigned short	intrpt_mode;
	unsigned char	intrpt_id[8];
	unsigned char	ver_release;
	unsigned char	ver_modification;
	unsigned char	ver_fix;
	unsigned char	deadman_restart;
	unsigned short	deadman;
	unsigned short	nrdevs;
	unsigned long	memp;
	unsigned long	hostp;
	unsigned long	slavep;
	unsigned char	hostreq;
	unsigned char	slavereq;
	unsigned char	cmd_reserved[30];
} cdkhdr_t;

#define	MODE_DDK	0
#define	MODE_CDK	1

#define	IMD_INTR	0x0
#define	IMD_PPINTR	0x1
#define	IMD_POLL	0xff

/*
 *	Define the memory mapping structure. This structure is pointed to by
 *	the memp field in the stlcdkhdr struct. As many as these structures
 *	as required are laid out in shared memory to define how the rest of
 *	shared memory is divided up. There will be one for each port.
 */
typedef struct cdkmem {
	unsigned short	dtype;
	unsigned long	offset;
} cdkmem_t;

#define	TYP_UNDEFINED	0x0
#define	TYP_ASYNCTRL	0x1
#define	TYP_ASYNC	0x20
#define	TYP_PARALLEL	0x40
#define	TYP_SYNCX21	0x60

/*****************************************************************************/

/*
 *	Following is a set of defines and structures used to actually deal
 *	with the serial ports on the board. Firstly is the set of commands
 *	that can be applied to ports.
 */
#define	ASYCMD		(((unsigned long) 'a') << 8)

#define	A_NULL		(ASYCMD | 0)
#define	A_FLUSH		(ASYCMD | 1)
#define	A_BREAK		(ASYCMD | 2)
#define	A_GETPORT	(ASYCMD | 3)
#define	A_SETPORT	(ASYCMD | 4)
#define	A_SETPORTF	(ASYCMD | 5)
#define	A_SETPORTFTX	(ASYCMD | 6)
#define	A_SETPORTFRX	(ASYCMD | 7)
#define	A_GETSIGNALS	(ASYCMD | 8)
#define	A_SETSIGNALS	(ASYCMD | 9)
#define	A_SETSIGNALSF	(ASYCMD | 10)
#define	A_SETSIGNALSFTX	(ASYCMD | 11)
#define	A_SETSIGNALSFRX	(ASYCMD | 12)
#define	A_GETNOTIFY	(ASYCMD | 13)
#define	A_SETNOTIFY	(ASYCMD | 14)
#define	A_NOTIFY	(ASYCMD | 15)
#define	A_PORTCTRL	(ASYCMD | 16)
#define	A_GETSTATS	(ASYCMD | 17)
#define	A_RQSTATE	(ASYCMD | 18)
#define	A_FLOWSTATE	(ASYCMD | 19)
#define	A_CLEARSTATS	(ASYCMD | 20)

/*
 *	Define those arguments used for simple commands.
 */
#define	FLUSHRX		0x1
#define	FLUSHTX		0x2

#define	BREAKON		-1
#define	BREAKOFF	-2

/*
 *	Define the port setting structure, and all those defines that go along
 *	with it. Basically this structure defines the characteristics of this
 *	port: baud rate, chars, parity, input/output char cooking etc.
 */
typedef struct asyport {
	unsigned long	baudout;
	unsigned long	baudin;
	unsigned long	iflag;
	unsigned long	oflag;
	unsigned long	lflag;
	unsigned long	pflag;
	unsigned long	flow;
	unsigned long	spare1;
	unsigned short	vtime;
	unsigned short	vmin;
	unsigned short	txlo;
	unsigned short	txhi;
	unsigned short	rxlo;
	unsigned short	rxhi;
	unsigned short	rxhog;
	unsigned short	spare2;
	unsigned char	csize;
	unsigned char	stopbs;
	unsigned char	parity;
	unsigned char	stopin;
	unsigned char	startin;
	unsigned char	stopout;
	unsigned char	startout;
	unsigned char	parmark;
	unsigned char	brkmark;
	unsigned char	cc[11];
} asyport_t;

#define	PT_STOP1	0x0
#define	PT_STOP15	0x1
#define	PT_STOP2	0x2

#define	PT_NOPARITY	0x0
#define	PT_ODDPARITY	0x1
#define	PT_EVENPARITY	0x2
#define	PT_MARKPARITY	0x3
#define	PT_SPACEPARITY	0x4

#define	F_NONE		0x0
#define	F_IXON		0x1
#define	F_IXOFF		0x2
#define	F_IXANY		0x4
#define	F_IOXANY	0x8
#define	F_RTSFLOW	0x10
#define	F_CTSFLOW	0x20
#define	F_DTRFLOW	0x40
#define	F_DCDFLOW	0x80
#define	F_DSROFLOW	0x100
#define	F_DSRIFLOW	0x200

#define	FI_NORX		0x1
#define	FI_RAW		0x2
#define	FI_ISTRIP	0x4
#define	FI_UCLC		0x8
#define	FI_INLCR	0x10
#define	FI_ICRNL	0x20
#define	FI_IGNCR	0x40
#define	FI_IGNBREAK	0x80
#define	FI_DSCRDBREAK	0x100
#define	FI_1MARKBREAK	0x200
#define	FI_2MARKBREAK	0x400
#define	FI_XCHNGBREAK	0x800
#define	FI_IGNRXERRS	0x1000
#define	FI_DSCDRXERRS	0x2000
#define	FI_1MARKRXERRS	0x4000
#define	FI_2MARKRXERRS	0x8000
#define	FI_XCHNGRXERRS	0x10000
#define	FI_DSCRDNULL	0x20000

#define	FO_OLCUC	0x1
#define	FO_ONLCR	0x2
#define	FO_OOCRNL	0x4
#define	FO_ONOCR	0x8
#define	FO_ONLRET	0x10
#define	FO_ONL		0x20
#define	FO_OBS		0x40
#define	FO_OVT		0x80
#define	FO_OFF		0x100
#define	FO_OTAB1	0x200
#define	FO_OTAB2	0x400
#define	FO_OTAB3	0x800
#define	FO_OCR1		0x1000
#define	FO_OCR2		0x2000
#define	FO_OCR3		0x4000
#define	FO_OFILL	0x8000
#define	FO_ODELL	0x10000

#define	P_RTSLOCK	0x1
#define	P_CTSLOCK	0x2
#define	P_MAPRTS	0x4
#define	P_MAPCTS	0x8
#define	P_LOOPBACK	0x10
#define	P_DTRFOLLOW	0x20
#define	P_FAKEDCD	0x40

#define	P_RXIMIN	0x10000
#define	P_RXITIME	0x20000
#define	P_RXTHOLD	0x40000

/*
 *	Define a structure to communicate serial port signal and data state
 *	information.
 */
typedef struct asysigs {
	unsigned long	data;
	unsigned long	signal;
	unsigned long	sigvalue;
} asysigs_t;

#define	DT_TXBUSY	0x1
#define	DT_TXEMPTY	0x2
#define	DT_TXLOW	0x4
#define	DT_TXHIGH	0x8
#define	DT_TXFULL	0x10
#define	DT_TXHOG	0x20
#define	DT_TXFLOWED	0x40
#define	DT_TXBREAK	0x80

#define	DT_RXBUSY	0x100
#define	DT_RXEMPTY	0x200
#define	DT_RXLOW	0x400
#define	DT_RXHIGH	0x800
#define	DT_RXFULL	0x1000
#define	DT_RXHOG	0x2000
#define	DT_RXFLOWED	0x4000
#define	DT_RXBREAK	0x8000

#define	SG_DTR		0x1
#define	SG_DCD		0x2
#define	SG_RTS		0x4
#define	SG_CTS		0x8
#define	SG_DSR		0x10
#define	SG_RI		0x20

/*
 *	Define the notification setting structure. This is used to tell the
 *	port what events we want to be informed about. Fields here use the
 *	same defines as for the asysigs structure above.
 */
typedef struct asynotify {
	unsigned long	ctrl;
	unsigned long	data;
	unsigned long	signal;
	unsigned long	sigvalue;
} asynotify_t;

/*
 *	Define the port control structure. It is used to do fine grain
 *	control operations on the port.
 */
typedef struct {
	unsigned long	rxctrl;
	unsigned long	txctrl;
	char		rximdch;
	char		tximdch;
	char		spare1;
	char		spare2;
} asyctrl_t;

#define	CT_ENABLE	0x1
#define	CT_DISABLE	0x2
#define	CT_STOP		0x4
#define	CT_START	0x8
#define	CT_STARTFLOW	0x10
#define	CT_STOPFLOW	0x20
#define	CT_SENDCHR	0x40

/*
 *	Define the stats structure kept for each port. This is a useful set
 *	of data collected for each port on the slave. The A_GETSTATS command
 *	is used to retrieve this data from the slave.
 */
typedef struct asystats {
	unsigned long	opens;
	unsigned long	txchars;
	unsigned long	rxchars;
	unsigned long	txringq;
	unsigned long	rxringq;
	unsigned long	txmsgs;
	unsigned long	rxmsgs;
	unsigned long	txflushes;
	unsigned long	rxflushes;
	unsigned long	overruns;
	unsigned long	framing;
	unsigned long	parity;
	unsigned long	ringover;
	unsigned long	lost;
	unsigned long	rxstart;
	unsigned long	rxstop;
	unsigned long	txstart;
	unsigned long	txstop;
	unsigned long	dcdcnt;
	unsigned long	dtrcnt;
	unsigned long	ctscnt;
	unsigned long	rtscnt;
	unsigned long	dsrcnt;
	unsigned long	ricnt;
	unsigned long	txbreaks;
	unsigned long	rxbreaks;
	unsigned long	signals;
	unsigned long	state;
	unsigned long	hwid;
} asystats_t;

/*****************************************************************************/

/*
 *	All command and control communication with a device on the slave is
 *	via a control block in shared memory. Each device has its own control
 *	block, defined by the following structure. The control block allows
 *	the host to open, close and control the device on the slave.
 */
typedef struct cdkctrl {
	unsigned char	open;
	unsigned char	close;
	unsigned long	openarg;
	unsigned long	closearg;
	unsigned long	cmd;
	unsigned long	status;
	unsigned long	args[32];
} cdkctrl_t;

/*
 *	Each device on the slave passes data to and from the host via a ring
 *	queue in shared memory. Define a ring queue structure to hold the
 *	vital information about each ring queue. Two ring queues will be
 *	allocated for each port, one for receive data and one for transmit
 *	data.
 */
typedef struct cdkasyrq {
	unsigned long	offset;
	unsigned short	size;
	unsigned short	head;
	unsigned short	tail;
} cdkasyrq_t;

/*
 *	Each asynchronous port is defined in shared memory by the following
 *	structure. It contains a control block to command a device, and also
 *	the necessary data channel information as well.
 */
typedef struct cdkasy {
	cdkctrl_t	ctrl;
	unsigned short	notify;
	asynotify_t	changed;
	unsigned short	receive;
	cdkasyrq_t	rxq;
	unsigned short	transmit;
	cdkasyrq_t	txq;
} cdkasy_t;

#pragma	pack()

/*****************************************************************************/

/*
 *	Define the set of ioctls used by the driver to do special things
 *	to the board. These include interrupting it, and initializing
 *	the driver after board startup and shutdown.
 */
#include <linux/ioctl.h>

#define	STL_BINTR	_IO('s',20)
#define	STL_BSTART	_IO('s',21)
#define	STL_BSTOP	_IO('s',22)
#define	STL_BRESET	_IO('s',23)

/*
 *	Define a set of ioctl extensions, used to get at special stuff.
 */
#define	STL_GETPFLAG	_IO('s',80)
#define	STL_SETPFLAG	_IO('s',81)

/*****************************************************************************/
#endif

include/linux/comstats.h

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/*****************************************************************************/

/*
 *	comstats.h  -- Serial Port Stats.
 *
 *	Copyright (C) 1996-1998  Stallion Technologies
 *	Copyright (C) 1994-1996  Greg Ungerer.
 *
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License as published by
 *	the Free Software Foundation; either version 2 of the License, or
 *	(at your option) any later version.
 *
 *	This program is distributed in the hope that it will be useful,
 *	but WITHOUT ANY WARRANTY; without even the implied warranty of
 *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *	GNU General Public License for more details.
 *
 *	You should have received a copy of the GNU General Public License
 *	along with this program; if not, write to the Free Software
 *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

/*****************************************************************************/
#ifndef	_COMSTATS_H
#define	_COMSTATS_H
/*****************************************************************************/

/*
 *	Serial port stats structure. The structure itself is UART
 *	independent, but some fields may be UART/driver specific (for
 *	example state).
 */

typedef struct {
	unsigned long	brd;
	unsigned long	panel;
	unsigned long	port;
	unsigned long	hwid;
	unsigned long	type;
	unsigned long	txtotal;
	unsigned long	rxtotal;
	unsigned long	txbuffered;
	unsigned long	rxbuffered;
	unsigned long	rxoverrun;
	unsigned long	rxparity;
	unsigned long	rxframing;
	unsigned long	rxlost;
	unsigned long	txbreaks;
	unsigned long	rxbreaks;
	unsigned long	txxon;
	unsigned long	txxoff;
	unsigned long	rxxon;
	unsigned long	rxxoff;
	unsigned long	txctson;
	unsigned long	txctsoff;
	unsigned long	rxrtson;
	unsigned long	rxrtsoff;
	unsigned long	modem;
	unsigned long	state;
	unsigned long	flags;
	unsigned long	ttystate;
	unsigned long	cflags;
	unsigned long	iflags;
	unsigned long	oflags;
	unsigned long	lflags;
	unsigned long	signals;
} comstats_t;


/*
 *	Board stats structure. Returns useful info about the board.
 */

#define	COM_MAXPANELS	8

typedef struct {
	unsigned long	panel;
	unsigned long	type;
	unsigned long	hwid;
	unsigned long	nrports;
} companel_t;

typedef struct {
	unsigned long	brd;
	unsigned long	type;
	unsigned long	hwid;
	unsigned long	state;
	unsigned long	ioaddr;
	unsigned long	ioaddr2;
	unsigned long	memaddr;
	unsigned long	irq;
	unsigned long	nrpanels;
	unsigned long	nrports;
	companel_t	panels[COM_MAXPANELS];
} combrd_t;


/*
 *	Define the ioctl operations for stats stuff.
 */
#include <linux/ioctl.h>

#define	COM_GETPORTSTATS	_IO('c',30)
#define	COM_CLRPORTSTATS	_IO('c',31)
#define	COM_GETBRDSTATS		_IO('c',32)


/*
 *	Define the set of ioctls that give user level access to the
 *	private port, panel and board structures. The argument required
 *	will be driver dependent!  
 */
#define	COM_READPORT		_IO('c',40)
#define	COM_READBOARD		_IO('c',41)
#define	COM_READPANEL		_IO('c',42)

/*****************************************************************************/
#endif

include/linux/istallion.h

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