Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit aec578f0 authored by Archana Sriram's avatar Archana Sriram Committed by Puranam V G Tejaswi
Browse files

msm: kgsl: Set correct values for SMMU protect register for A3xx



For programming the CP Protect register for SMMU in A3xx GPU, pass
correct values for SMMU registers base offset and the count of
registers to be protected.

Change-Id: I9fa809db79efc79bb7a59304fa2b4607ed1fc567
Signed-off-by: default avatarArchana Sriram <apsrir@codeaurora.org>
parent d56d87ab
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment