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Commit ae9156b6 authored by Paul Cercueil's avatar Paul Cercueil Committed by Vinod Koul
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dmaengine: dma-jz4780: Add support for the JZ4725B SoC



The JZ4725B has one DMA core starring six DMA channels.
As for the JZ4770, each DMA channel's clock can be enabled with
a register write, the difference here being that once started, it
is not possible to turn it off.

Signed-off-by: default avatarPaul Cercueil <paul@crapouillou.net>
Tested-by: default avatarMathieu Malaterre <malat@debian.org>
Reviewed-by: default avatarPrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent ffaaa8cc
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+20 −3
Original line number Diff line number Diff line
@@ -94,6 +94,7 @@
#define JZ_SOC_DATA_ALLOW_LEGACY_DT	BIT(0)
#define JZ_SOC_DATA_PROGRAMMABLE_DMA	BIT(1)
#define JZ_SOC_DATA_PER_CHAN_PM		BIT(2)
#define JZ_SOC_DATA_NO_DCKES_DCKEC	BIT(3)

/**
 * struct jz4780_dma_hwdesc - descriptor structure read by the DMA controller.
@@ -208,14 +209,23 @@ static inline void jz4780_dma_ctrl_writel(struct jz4780_dma_dev *jzdma,
static inline void jz4780_dma_chan_enable(struct jz4780_dma_dev *jzdma,
	unsigned int chn)
{
	if (jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM)
		jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKES, BIT(chn));
	if (jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM) {
		unsigned int reg;

		if (jzdma->soc_data->flags & JZ_SOC_DATA_NO_DCKES_DCKEC)
			reg = JZ_DMA_REG_DCKE;
		else
			reg = JZ_DMA_REG_DCKES;

		jz4780_dma_ctrl_writel(jzdma, reg, BIT(chn));
	}
}

static inline void jz4780_dma_chan_disable(struct jz4780_dma_dev *jzdma,
	unsigned int chn)
{
	if (jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM)
	if ((jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM) &&
			!(jzdma->soc_data->flags & JZ_SOC_DATA_NO_DCKES_DCKEC))
		jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKEC, BIT(chn));
}

@@ -978,6 +988,12 @@ static const struct jz4780_dma_soc_data jz4740_dma_soc_data = {
	.transfer_ord_max = 5,
};

static const struct jz4780_dma_soc_data jz4725b_dma_soc_data = {
	.nb_channels = 6,
	.transfer_ord_max = 5,
	.flags = JZ_SOC_DATA_PER_CHAN_PM | JZ_SOC_DATA_NO_DCKES_DCKEC,
};

static const struct jz4780_dma_soc_data jz4770_dma_soc_data = {
	.nb_channels = 6,
	.transfer_ord_max = 6,
@@ -992,6 +1008,7 @@ static const struct jz4780_dma_soc_data jz4780_dma_soc_data = {

static const struct of_device_id jz4780_dma_dt_match[] = {
	{ .compatible = "ingenic,jz4740-dma", .data = &jz4740_dma_soc_data },
	{ .compatible = "ingenic,jz4725b-dma", .data = &jz4725b_dma_soc_data },
	{ .compatible = "ingenic,jz4770-dma", .data = &jz4770_dma_soc_data },
	{ .compatible = "ingenic,jz4780-dma", .data = &jz4780_dma_soc_data },
	{},