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Commit ae76f635 authored by Guo Ren's avatar Guo Ren
Browse files

csky: Optimize arch_sync_dma_for_cpu/device with dma_inv_range 



DMA_FROM_DEVICE only need to read dma data of memory into CPU cache,
so there is no need to clear cache before. Also clear + inv for
DMA_FROM_DEVICE won't cause problem, because the memory range for dma
won't be touched by software during dma working.

Changes for V2:
 - Remove clr cache and ignore the DMA_TO_DEVICE in _for_cpu.
 - Change inv to wbinv cache with DMA_FROM_DEVICE in _for_device.

Signed-off-by: default avatarGuo Ren <ren_guo@c-sky.com>
Cc: Arnd Bergmann <arnd@arndb.de>
parent 4af9027d

arch/csky/include/asm/cache.h

+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ void cache_wbinv_range(unsigned long start, unsigned long end); 
void cache_wbinv_all(void);



void dma_wbinv_range(unsigned long start, unsigned long end);

void dma_inv_range(unsigned long start, unsigned long end);

void dma_wb_range(unsigned long start, unsigned long end);



#endif

arch/csky/mm/cachev1.c

+6 −1
Original line number Diff line number Diff line
@@ -120,7 +120,12 @@ void dma_wbinv_range(unsigned long start, unsigned long end) 
	cache_op_range(start, end, DATA_CACHE|CACHE_CLR|CACHE_INV, 1);

}



void dma_inv_range(unsigned long start, unsigned long end)

{

	cache_op_range(start, end, DATA_CACHE|CACHE_CLR|CACHE_INV, 1);

}



void dma_wb_range(unsigned long start, unsigned long end)

{

	cache_op_range(start, end, DATA_CACHE|CACHE_INV, 1);

	cache_op_range(start, end, DATA_CACHE|CACHE_CLR|CACHE_INV, 1);

}

arch/csky/mm/cachev2.c

+10 −1
Original line number Diff line number Diff line
@@ -69,11 +69,20 @@ void dma_wbinv_range(unsigned long start, unsigned long end) 
	sync_is();

}



void dma_inv_range(unsigned long start, unsigned long end)

{

	unsigned long i = start & ~(L1_CACHE_BYTES - 1);



	for (; i < end; i += L1_CACHE_BYTES)

		asm volatile("dcache.iva %0\n"::"r"(i):"memory");

	sync_is();

}



void dma_wb_range(unsigned long start, unsigned long end)

{

	unsigned long i = start & ~(L1_CACHE_BYTES - 1);



	for (; i < end; i += L1_CACHE_BYTES)

		asm volatile("dcache.civa %0\n"::"r"(i):"memory");

		asm volatile("dcache.cva %0\n"::"r"(i):"memory");

	sync_is();

}

arch/csky/mm/dma-mapping.c

+2 −3
Original line number Diff line number Diff line
@@ -85,11 +85,10 @@ void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr, 
{

	switch (dir) {

	case DMA_TO_DEVICE:

		cache_op(paddr, size, dma_wb_range);

		break;

		return;

	case DMA_FROM_DEVICE:

	case DMA_BIDIRECTIONAL:

		cache_op(paddr, size, dma_wbinv_range);

		cache_op(paddr, size, dma_inv_range);

		break;

	default:

		BUG();