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Commit adf6eb77 authored by James Liao's avatar James Liao Committed by Matthias Brugger
Browse files

arm: dts: mt2701: Add clock controller device nodes 



Add clock controller nodes for MT2701, include topckgen, infracfg,
pericfg and apmixedsys. This patch also add two oscillators that
provide clocks for MT2701.

Signed-off-by: default avatarJames Liao <jamesjj.liao@mediatek.com>
Signed-off-by: default avatarErin Lo <erin.lo@mediatek.com>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent a3207d64

arch/arm/boot/dts/mt2701.dtsi

+42 −0
Original line number Diff line number Diff line
@@ -12,8 +12,10 @@ 
 * GNU General Public License for more details.

 */



#include <dt-bindings/clock/mt2701-clk.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/reset/mt2701-resets.h>

#include "skeleton64.dtsi"

#include "mt2701-pinfunc.h"
@@ -77,6 +79,20 @@ 
		#clock-cells = <0>;

	};



	clk26m: oscillator@0 {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <26000000>;

		clock-output-names = "clk26m";

	};



	rtc32k: oscillator@1 {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <32000>;

		clock-output-names = "rtc32k";

	};



	timer {

		compatible = "arm,armv7-timer";

		interrupt-parent = <&gic>;
@@ -104,6 +120,26 @@ 
		reg = <0 0x10005000 0 0x1000>;

	};



	topckgen: syscon@10000000 {

		compatible = "mediatek,mt2701-topckgen", "syscon";

		reg = <0 0x10000000 0 0x1000>;

		#clock-cells = <1>;

	};



	infracfg: syscon@10001000 {

		compatible = "mediatek,mt2701-infracfg", "syscon";

		reg = <0 0x10001000 0 0x1000>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	pericfg: syscon@10003000 {

		compatible = "mediatek,mt2701-pericfg", "syscon";

		reg = <0 0x10003000 0 0x1000>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	watchdog: watchdog@10007000 {

		compatible = "mediatek,mt2701-wdt",

			     "mediatek,mt6589-wdt";
@@ -128,6 +164,12 @@ 
		reg = <0 0x10200100 0 0x1c>;

	};



	apmixedsys: syscon@10209000 {

		compatible = "mediatek,mt2701-apmixedsys", "syscon";

		reg = <0 0x10209000 0 0x1000>;

		#clock-cells = <1>;

	};



	gic: interrupt-controller@10211000 {

		compatible = "arm,cortex-a7-gic";

		interrupt-controller;