Merge "msm: kgsl: Add A660 specific registers to snapshot" (adbbbc56) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/gpu/msm/adreno_a6xx_snapshot.c

+42 −0

Original line number	Diff line number	Diff line
		@@ -42,6 +42,10 @@ static const unsigned int a6xx_fe_cluster[] = {
		0xA00E, 0xA0EF, 0xA0F8, 0xA0F8,
		};

		static const unsigned int a660_fe_cluster[] = {
		0x9807, 0x9807,
		};

		static const unsigned int a6xx_pc_vs_cluster[] = {
		0x9100, 0x9108, 0x9300, 0x9306, 0x9980, 0x9981, 0x9B00, 0x9B07,
		};
		@@ -92,6 +96,8 @@ static struct a6xx_cluster_registers {
		NULL },
		{ CP_CLUSTER_PC_VS, a6xx_pc_vs_cluster,
		ARRAY_SIZE(a6xx_pc_vs_cluster)/2, NULL },
		{ CP_CLUSTER_FE, a660_fe_cluster, ARRAY_SIZE(a660_fe_cluster)/2,
		NULL },
		};

		struct a6xx_cluster_regs_info {
		@@ -302,6 +308,11 @@ static const unsigned int a6xx_registers[] = {
		0xA630, 0xA630,
		};

		static const unsigned int a660_registers[] = {
		/* UCHE */
		0x0E3C, 0x0E3C,
		};

		/*
		* Set of registers to dump for A6XX before actually triggering crash dumper.
		* Registers in pairs - first value is the start offset, second
		@@ -570,6 +581,7 @@ static struct reg_list {
		uint64_t offset;
		} a6xx_reg_list[] = {
		{ a6xx_registers, ARRAY_SIZE(a6xx_registers) / 2, NULL },
		{ a660_registers, ARRAY_SIZE(a660_registers) / 2, NULL },
		{ a6xx_rb_rac_registers, ARRAY_SIZE(a6xx_rb_rac_registers) / 2,
		&_a6xx_rb_rac_aperture },
		{ a6xx_rb_rbp_registers, ARRAY_SIZE(a6xx_rb_rbp_registers) / 2,
		@@ -1164,6 +1176,11 @@ static void a6xx_snapshot_mvc_regs(struct kgsl_device *device,
		for (i = 0; i < ARRAY_SIZE(a6xx_clusters); i++) {
		struct a6xx_cluster_registers *cluster = &a6xx_clusters[i];

		/* Skip registers that dont exists on targets other than A660 */
		if (!adreno_is_a660(ADRENO_DEVICE(device)) &&
		(cluster->regs == a660_fe_cluster))
		continue;

		info.cluster = cluster;
		for (j = 0; j < A6XX_NUM_CTXTS; j++) {
		info.ctxt_id = j;
		@@ -1799,6 +1816,11 @@ void a6xx_snapshot(struct adreno_device *adreno_dev,
		_a6xx_do_crashdump(device);

		for (i = 0; i < ARRAY_SIZE(a6xx_reg_list); i++) {
		/* Skip registers that dont exists on targets other than A660 */
		if (!adreno_is_a660(adreno_dev) &&
		(a6xx_reg_list[i].regs == a660_registers))
		continue;

		kgsl_snapshot_add_section(device, KGSL_SNAPSHOT_SECTION_REGS,
		snapshot, a6xx_snapshot_registers, &a6xx_reg_list[i]);
		}
		@@ -1881,6 +1903,11 @@ static int _a6xx_crashdump_init_mvc(struct adreno_device *adreno_dev,
		for (i = 0; i < ARRAY_SIZE(a6xx_clusters); i++) {
		struct a6xx_cluster_registers *cluster = &a6xx_clusters[i];

		/* Skip registers that dont exists on targets other than A660 */
		if (!adreno_is_a660(adreno_dev) &&
		(cluster->regs == a660_fe_cluster))
		continue;

		/* The VPC registers are driven by VPC_PS cluster on a650 */
		if (adreno_is_a650_family(adreno_dev) &&
		(cluster->regs == a6xx_vpc_ps_cluster))
		@@ -2050,6 +2077,11 @@ void a6xx_crashdump_init(struct adreno_device *adreno_dev)
		for (i = 0; i < ARRAY_SIZE(a6xx_reg_list); i++) {
		struct reg_list *regs = &a6xx_reg_list[i];

		/* Skip registers that dont exists on targets other than A660 */
		if (!adreno_is_a660(adreno_dev) &&
		(regs->regs == a660_registers))
		continue;

		/* 16 bytes for programming the aperture */
		if (regs->sel)
		script_size += 16;
		@@ -2080,6 +2112,11 @@ void a6xx_crashdump_init(struct adreno_device *adreno_dev)
		for (i = 0; i < ARRAY_SIZE(a6xx_clusters); i++) {
		struct a6xx_cluster_registers *cluster = &a6xx_clusters[i];

		/* Skip registers that dont exists on targets other than A660 */
		if (!adreno_is_a660(adreno_dev) &&
		(cluster->regs == a660_fe_cluster))
		continue;

		/* 16 bytes if cluster sel exists */
		if (cluster->sel)
		script_size += 16;
		@@ -2166,6 +2203,11 @@ void a6xx_crashdump_init(struct adreno_device *adreno_dev)
		for (i = 0; i < ARRAY_SIZE(a6xx_reg_list); i++) {
		struct reg_list *regs = &a6xx_reg_list[i];

		/* Skip registers that dont exists on targets other than A660 */
		if (!adreno_is_a660(adreno_dev) &&
		(regs->regs == a660_registers))
		continue;

		regs->offset = offset;

		/* Program the SEL_CNTL_CD register appropriately */