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Commit ad884001 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v5.1-next-dts64' of... 

Merge tag 'v5.1-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt

mt8173:
- use assinged-clocks and assigned-clock-parents
- fix compatible for SoC to a72
- add pmu nodes

mt8183:
- add sysirq binding
- add pinctrl dt header file

mt7629:
- update bindings description fo sysirq, uart and scpsys

mt8516:
- add binding description for watchdog, timer, uart and sysirq

* tag 'v5.1-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux

:
  arm64: dts: mt8173: add pmu nodes for mt8173
  arm64: dts: mt8173: correct cpu type of cpu2 and cpu3 to cortex-a72
  dt-bindings: irq: mtk,sysirq: add support for MT8516
  dt-bindings: serial: mtk-uart: add support for MT8516
  dt-bindings: timer: mtk-timer: add support for MT8516
  dt-bindings: wdog: mtk-wdt: add support for MT851
  dt-bindings: soc: fix a typo for MT7623A
  dt-bindings: mediatek: update bindings for MT7629 SoC
  arm64: dts: mt8183: add pinctrl file
  dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
  arm64: dts: Using standard CCF interface to set vcodec clk

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents c8e3993d a4599f6e

Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt

+5 −2
Original line number Diff line number Diff line 
+Mediatek MT65xx/MT67xx/MT81xx sysirq

MediaTek sysirq



Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI

MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI

interrupt.



Required properties:

- compatible: should be

	"mediatek,mt8516-sysirq", "mediatek,mt6577-sysirq": for MT8516

	"mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183

	"mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173

	"mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135

	"mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127

	"mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622

	"mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq": for MT7623

	"mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629

	"mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795

	"mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797

	"mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765

Documentation/devicetree/bindings/serial/mtk-uart.txt

+3 −1
Original line number Diff line number Diff line 
* Mediatek Universal Asynchronous Receiver/Transmitter (UART)

* MediaTek Universal Asynchronous Receiver/Transmitter (UART)



Required properties:

- compatible should contain:
@@ -13,10 +13,12 @@ Required properties: 
  * "mediatek,mt6797-uart" for MT6797 compatible UARTS

  * "mediatek,mt7622-uart" for MT7622 compatible UARTS

  * "mediatek,mt7623-uart" for MT7623 compatible UARTS

  * "mediatek,mt7629-uart" for MT7629 compatible UARTS

  * "mediatek,mt8127-uart" for MT8127 compatible UARTS

  * "mediatek,mt8135-uart" for MT8135 compatible UARTS

  * "mediatek,mt8173-uart" for MT8173 compatible UARTS

  * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS

  * "mediatek,mt8516-uart" for MT8516 compatible UARTS

  * "mediatek,mt6577-uart" for MT6577 and all of the above



- reg: The base address of the UART register bank.

Documentation/devicetree/bindings/soc/mediatek/scpsys.txt

+3 −2
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ Required properties: 
	- "mediatek,mt7622-scpsys"

	- "mediatek,mt7623-scpsys", "mediatek,mt2701-scpsys": For MT7623 SoC

	- "mediatek,mt7623a-scpsys": For MT7623A SoC

	- "mediatek,mt7629-scpsys", "mediatek,mt7622-scpsys": For MT7629 SoC

	- "mediatek,mt8173-scpsys"

- #power-domain-cells: Must be 1

- reg: Address range of the SCPSYS unit
@@ -33,8 +34,8 @@ Required properties: 
	Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif"

	Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"

	Required clocks for MT6797: "mm", "mfg", "vdec"

	Required clocks for MT7622: "hif_sel"

	Required clocks for MT7622A: "ethif"

	Required clocks for MT7622 or MT7629: "hif_sel"

	Required clocks for MT7623A: "ethif"

	Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"



Optional properties:

Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ Required properties: 
	* "mediatek,mt8127-timer" for MT8127 compatible timers (GPT)

	* "mediatek,mt8135-timer" for MT8135 compatible timers (GPT)

	* "mediatek,mt8173-timer" for MT8173 compatible timers (GPT)

	* "mediatek,mt8516-timer" for MT8516 compatible timers (GPT)

	* "mediatek,mt6577-timer" for MT6577 and all above compatible timers (GPT)



	For those SoCs that use SYST

Documentation/devicetree/bindings/watchdog/mtk-wdt.txt

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ Required properties: 
	"mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622

	"mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623

	"mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629

	"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516



- reg : Specifies base physical address and size of the registers.