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Commit ad2bdb44 authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Mika Kuoppala
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drm/i915: Add WaInsertDummyPushConstP for bxt and kbl 



Add this workaround for both bxt and kbl up to until
rev B0.

References: HSD#2136703
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-16-git-send-email-mika.kuoppala@intel.com
parent c0b730d5

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -6089,6 +6089,7 @@ enum skl_disp_power_wells { 
# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC	((1<<10) | (1<<26))

# define GEN9_RHWO_OPTIMIZATION_DISABLE		(1<<14)

#define COMMON_SLICE_CHICKEN2			_MMIO(0x7014)

# define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION (1<<8)

# define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE	(1<<0)



#define HIZ_CHICKEN					_MMIO(0x7018)

drivers/gpu/drm/i915/intel_ringbuffer.c

+10 −0
Original line number Diff line number Diff line
@@ -1183,6 +1183,11 @@ static int bxt_init_workarounds(struct intel_engine_cs *engine) 
		I915_WRITE(GEN8_L3SQCREG1, L3_GENERAL_PRIO_CREDITS(62) |

					   L3_HIGH_PRIO_CREDITS(2));



	/* WaInsertDummyPushConstPs:bxt */

	if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B0))

		WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,

				  GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);



	return 0;

}
@@ -1217,6 +1222,11 @@ static int kbl_init_workarounds(struct intel_engine_cs *engine) 
		I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) |

			   GEN8_LQSC_RO_PERF_DIS);



	/* WaInsertDummyPushConstPs:kbl */

	if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))

		WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,

				  GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);



	/* WaDisableLSQCROPERFforOCL:kbl */

	ret = wa_ring_whitelist_reg(engine, GEN8_L3SQCREG4);

	if (ret)