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Commit ac19da4f authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "iommu/arm-smmu: Fix io-coherency enablement for clients using S1 bypass"

parents c4c415a1 76296974

drivers/iommu/arm-smmu.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -1715,6 +1715,7 @@ static void arm_smmu_write_context_bank(struct arm_smmu_device *smmu, int idx, 




		reg |= FIELD_PREP(SCTLR_WACFG, SCTLR_WACFG_WA) |

		reg |= FIELD_PREP(SCTLR_WACFG, SCTLR_WACFG_WA) |

		       FIELD_PREP(SCTLR_RACFG, SCTLR_RACFG_RA) |

		       FIELD_PREP(SCTLR_RACFG, SCTLR_RACFG_RA) |

		       FIELD_PREP(SCTLR_SHCFG, SCTLR_SHCFG_OSH) |

		       SCTLR_MTCFG |

		       SCTLR_MTCFG |

		       FIELD_PREP(SCTLR_MEM_ATTR, SCTLR_MEM_ATTR_OISH_WB_CACHE);

		       FIELD_PREP(SCTLR_MEM_ATTR, SCTLR_MEM_ATTR_OISH_WB_CACHE);

	} else {

	} else {

drivers/iommu/arm-smmu.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -153,6 +153,7 @@ enum arm_smmu_cbar_type { 
#define SCTLR_RACFG			GENMASK(25, 24)

#define SCTLR_RACFG			GENMASK(25, 24)

#define SCTLR_RACFG_RA			0x2

#define SCTLR_RACFG_RA			0x2

#define SCTLR_SHCFG			GENMASK(23, 22)

#define SCTLR_SHCFG			GENMASK(23, 22)

#define SCTLR_SHCFG_OSH			0x1

#define SCTLR_SHCFG_NSH			0x3

#define SCTLR_SHCFG_NSH			0x3

#define SCTLR_MTCFG			BIT(20)

#define SCTLR_MTCFG			BIT(20)

#define SCTLR_MEM_ATTR			GENMASK(19, 16)

#define SCTLR_MEM_ATTR			GENMASK(19, 16)