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Commit abdc40c6 authored by Veera Vegivada's avatar Veera Vegivada
Browse files

ARM: dts: msm: Add device tree node for GP2 clock driven led 

Add device tree configurations for GP2 clock driven led.

Change-Id: I9cd2584aa25f3c2011dcc0d0f6648bd84996d811
parent 16333bdb

qcom/sm8150-pinctrl.dtsi

+29 −0
Original line number Diff line number Diff line
@@ -5098,5 +5098,34 @@ 
				output-high;

			};

		};



		qcom_clk_led_gp2_pins: qcom_clk_led_gp2_pins {

			qcom_clk_led_gp2_active: qcom_clk_led_gp2_active {

				mux {

					pins = "gpio21";

					function = "gcc_gp2";

				};



				config {

					pins = "gpio21";

					drive-strength = <2>;

					bias-disable;

				};

			};



			qcom_clk_led_gp2_sleep: qqcom_clk_led_gp2_sleep {

				mux {

					pins = "gpio21";

					function = "gpio";

				};



				config {

					pins = "gpio21";

					drive-strength = <2>;

					bias-pull-down;

				};

			};

		};



	};

};

qcom/sm8150.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -1073,6 +1073,20 @@ 
		#freq-domain-cells = <2>;

	};



	qcom_clk_led: qcom_clk_led {

		compatible = "qcom,clk-led-pwm";

		qcom,label = "led_clk_gp2";

		clocks = <&gcc GCC_GP2_CLK>;

		clock-names = "core";

		assigned-clocks = <&gcc GCC_GP2_CLK>;

		assigned-clock-rates = <80000>;

		qcom,max_duty = <53>;

		pinctrl-names = "active", "sleep";

		pinctrl-0 = <&qcom_clk_led_gp2_active>;

		pinctrl-1 = <&qcom_clk_led_gp2_sleep>;

		status = "disabled";

	};



	spmi_bus: qcom,spmi@c440000 {

		compatible = "qcom,spmi-pmic-arb";

		reg = <0xc440000 0x1100>,