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Commit ab8dff4b authored by Alexey Kardashevskiy's avatar Alexey Kardashevskiy Committed by Greg Kroah-Hartman
Browse files

powerpc/mm: Switch obsolete dssall to .long 



commit d51f86cfd8e378d4907958db77da3074f6dce3ba upstream.

The dssall ("Data Stream Stop All") instruction is obsolete altogether
with other Data Cache Instructions since ISA 2.03 (year 2006).

LLVM IAS does not support it but PPC970 seems to be using it.
This switches dssall to .long as there is no much point in fixing LLVM.

Signed-off-by: default avatarAlexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211221055904.555763-6-aik@ozlabs.ru


[sudip: adjust context]
Signed-off-by: default avatarSudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 1a48a41f

arch/powerpc/include/asm/ppc-opcode.h

+2 −0
Original line number Diff line number Diff line
@@ -204,6 +204,7 @@ 
#define PPC_INST_ICBT			0x7c00002c

#define PPC_INST_ICSWX			0x7c00032d

#define PPC_INST_ICSWEPX		0x7c00076d

#define PPC_INST_DSSALL			0x7e00066c

#define PPC_INST_ISEL			0x7c00001e

#define PPC_INST_ISEL_MASK		0xfc00003e

#define PPC_INST_LDARX			0x7c0000a8
@@ -439,6 +440,7 @@ 
					__PPC_RA(a) | __PPC_RB(b))

#define	PPC_DCBZL(a, b)		stringify_in_c(.long PPC_INST_DCBZL | \

					__PPC_RA(a) | __PPC_RB(b))

#define PPC_DSSALL		stringify_in_c(.long PPC_INST_DSSALL)

#define PPC_LQARX(t, a, b, eh)	stringify_in_c(.long PPC_INST_LQARX | \

					___PPC_RT(t) | ___PPC_RA(a) | \

					___PPC_RB(b) | __PPC_EH(eh))

arch/powerpc/kernel/idle_6xx.S

+1 −1
Original line number Diff line number Diff line
@@ -129,7 +129,7 @@ BEGIN_FTR_SECTION 
END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)

	mtspr	SPRN_HID0,r4

BEGIN_FTR_SECTION

	DSSALL

	PPC_DSSALL

	sync

END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)

	lwz	r8,TI_LOCAL_FLAGS(r2)	/* set napping bit */

arch/powerpc/kernel/l2cr_6xx.S

+3 −3
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L2CR) 


	/* Stop DST streams */

BEGIN_FTR_SECTION

	DSSALL

	PPC_DSSALL

	sync

END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
@@ -293,7 +293,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR) 
	isync



	/* Stop DST streams */

	DSSALL

	PPC_DSSALL

	sync



	/* Get the current enable bit of the L3CR into r4 */
@@ -402,7 +402,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR) 
_GLOBAL(__flush_disable_L1)

	/* Stop pending alitvec streams and memory accesses */

BEGIN_FTR_SECTION

	DSSALL

	PPC_DSSALL

END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)

 	sync

arch/powerpc/kernel/swsusp_32.S

+1 −1
Original line number Diff line number Diff line
@@ -181,7 +181,7 @@ _GLOBAL(swsusp_arch_resume) 
#ifdef CONFIG_ALTIVEC

	/* Stop pending alitvec streams and memory accesses */

BEGIN_FTR_SECTION

	DSSALL

	PPC_DSSALL

END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)

#endif

 	sync

arch/powerpc/kernel/swsusp_asm64.S

+1 −1
Original line number Diff line number Diff line
@@ -142,7 +142,7 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR) 
_GLOBAL(swsusp_arch_resume)

	/* Stop pending alitvec streams and memory accesses */

BEGIN_FTR_SECTION

	DSSALL

	PPC_DSSALL

END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)

	sync