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Unverified Commit ab7b4ee9 authored by Ryder Lee's avatar Ryder Lee Committed by Mark Brown
Browse files

ASoC: mediatek: Add MTK_STREAM_NUM to mtk-base-afe.h 



Add MTK_STREAM_NUM to common header and modify related stuff so that
the other SoCs can reuse it.

Signed-off-by: default avatarRyder Lee <ryder.lee@mediatek.com>
Reviewed-by: default avatarGarlic Tseng <garlic.tseng@mediatek.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent cf870273

sound/soc/mediatek/common/mtk-base-afe.h

+2 −0
Original line number Diff line number Diff line
@@ -17,6 +17,8 @@ 
#ifndef _MTK_BASE_AFE_H_

#define _MTK_BASE_AFE_H_



#define MTK_STREAM_NUM (SNDRV_PCM_STREAM_LAST + 1)



struct mtk_base_memif_data {

	int id;

	const char *name;

sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c

+9 −6
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ int mt2701_init_clock(struct mtk_base_afe *afe) 
	/* Get I2S related clocks */

	for (i = 0; i < MT2701_I2S_NUM; i++) {

		struct mt2701_i2s_path *i2s_path = &afe_priv->i2s_path[i];

		struct clk *i2s_ck;

		char name[13];



		snprintf(name, sizeof(name), "i2s%d_src_sel", i);
@@ -70,18 +71,20 @@ int mt2701_init_clock(struct mtk_base_afe *afe) 
		}



		snprintf(name, sizeof(name), "i2so%d_hop_ck", i);

		i2s_path->hop_ck[I2S_OUT] = devm_clk_get(afe->dev, name);

		if (IS_ERR(i2s_path->hop_ck[I2S_OUT])) {

		i2s_ck = devm_clk_get(afe->dev, name);

		if (IS_ERR(i2s_ck)) {

			dev_err(afe->dev, "failed to get %s\n", name);

			return PTR_ERR(i2s_path->hop_ck[I2S_OUT]);

			return PTR_ERR(i2s_ck);

		}

		i2s_path->hop_ck[SNDRV_PCM_STREAM_PLAYBACK] = i2s_ck;



		snprintf(name, sizeof(name), "i2si%d_hop_ck", i);

		i2s_path->hop_ck[I2S_IN] = devm_clk_get(afe->dev, name);

		if (IS_ERR(i2s_path->hop_ck[I2S_IN])) {

		i2s_ck = devm_clk_get(afe->dev, name);

		if (IS_ERR(i2s_ck)) {

			dev_err(afe->dev, "failed to get %s\n", name);

			return PTR_ERR(i2s_path->hop_ck[I2S_IN]);

			return PTR_ERR(i2s_ck);

		}

		i2s_path->hop_ck[SNDRV_PCM_STREAM_CAPTURE] = i2s_ck;



		snprintf(name, sizeof(name), "asrc%d_out_ck", i);

		i2s_path->asrco_ck = devm_clk_get(afe->dev, name);

sound/soc/mediatek/mt2701/mt2701-afe-common.h

+5 −12
Original line number Diff line number Diff line
@@ -23,7 +23,6 @@ 
#include "mt2701-reg.h"

#include "../common/mtk-base-afe.h"



#define MT2701_STREAM_DIR_NUM (SNDRV_PCM_STREAM_LAST + 1)

#define MT2701_PLL_DOMAIN_0_RATE	98304000

#define MT2701_PLL_DOMAIN_1_RATE	90316800

#define MT2701_I2S_NUM	4
@@ -100,19 +99,13 @@ struct mt2701_i2s_data { 
	int i2s_asrc_fs_mask;

};



enum mt2701_i2s_dir {

	I2S_OUT,

	I2S_IN,

	I2S_DIR_NUM,

};



struct mt2701_i2s_path {

	int dai_id;

	int mclk_rate;

	int on[I2S_DIR_NUM];

	int occupied[I2S_DIR_NUM];

	const struct mt2701_i2s_data *i2s_data[I2S_DIR_NUM];

	struct clk *hop_ck[I2S_DIR_NUM];

	int on[MTK_STREAM_NUM];

	int occupied[MTK_STREAM_NUM];

	const struct mt2701_i2s_data *i2s_data[MTK_STREAM_NUM];

	struct clk *hop_ck[MTK_STREAM_NUM];

	struct clk *sel_ck;

	struct clk *div_ck;

	struct clk *mclk_ck;
@@ -123,7 +116,7 @@ struct mt2701_afe_private { 
	struct mt2701_i2s_path i2s_path[MT2701_I2S_NUM];

	struct clk *base_ck[MT2701_BASE_CLK_NUM];

	struct clk *mrgif_ck;

	bool mrg_enable[MT2701_STREAM_DIR_NUM];

	bool mrg_enable[MTK_STREAM_NUM];

};



#endif

sound/soc/mediatek/mt2701/mt2701-afe-pcm.c

+14 −53
Original line number Diff line number Diff line
@@ -1256,63 +1256,24 @@ static const struct mtk_base_irq_data irq_data[MT2701_IRQ_ASYS_END] = { 
	}

};



static const struct mt2701_i2s_data mt2701_i2s_data[MT2701_I2S_NUM][2] = {

static const struct mt2701_i2s_data mt2701_i2s_data[][2] = {

	{

		{

			.i2s_ctrl_reg = ASYS_I2SO1_CON,

			.i2s_asrc_fs_shift = 0,

			.i2s_asrc_fs_mask = 0x1f,



		},

		{

			.i2s_ctrl_reg = ASYS_I2SIN1_CON,

			.i2s_asrc_fs_shift = 0,

			.i2s_asrc_fs_mask = 0x1f,



		},

	},

	{

		{

			.i2s_ctrl_reg = ASYS_I2SO2_CON,

			.i2s_asrc_fs_shift = 5,

			.i2s_asrc_fs_mask = 0x1f,



		},

		{

			.i2s_ctrl_reg = ASYS_I2SIN2_CON,

			.i2s_asrc_fs_shift = 5,

			.i2s_asrc_fs_mask = 0x1f,



		},

	},

	{

		{

			.i2s_ctrl_reg = ASYS_I2SO3_CON,

			.i2s_asrc_fs_shift = 10,

			.i2s_asrc_fs_mask = 0x1f,



		{ ASYS_I2SO1_CON, 0, 0x1f },

		{ ASYS_I2SIN1_CON, 0, 0x1f },

	},

	{

			.i2s_ctrl_reg = ASYS_I2SIN3_CON,

			.i2s_asrc_fs_shift = 10,

			.i2s_asrc_fs_mask = 0x1f,



		},

		{ ASYS_I2SO2_CON, 5, 0x1f },

		{ ASYS_I2SIN2_CON, 5, 0x1f },

	},

	{

		{

			.i2s_ctrl_reg = ASYS_I2SO4_CON,

			.i2s_asrc_fs_shift = 15,

			.i2s_asrc_fs_mask = 0x1f,



		{ ASYS_I2SO3_CON, 10, 0x1f },

		{ ASYS_I2SIN3_CON, 10, 0x1f },

	},

	{

			.i2s_ctrl_reg = ASYS_I2SIN4_CON,

			.i2s_asrc_fs_shift = 15,

			.i2s_asrc_fs_mask = 0x1f,



		},

		{ ASYS_I2SO4_CON, 15, 0x1f },

		{ ASYS_I2SIN4_CON, 15, 0x1f },

	},

	/* TODO - extend control registers supported by newer SoCs */

};



static irqreturn_t mt2701_asys_isr(int irq_id, void *dev)
@@ -1434,10 +1395,10 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev) 


	/* I2S initialize */

	for (i = 0; i < MT2701_I2S_NUM; i++) {

		afe_priv->i2s_path[i].i2s_data[I2S_OUT]

			= &mt2701_i2s_data[i][I2S_OUT];

		afe_priv->i2s_path[i].i2s_data[I2S_IN]

			= &mt2701_i2s_data[i][I2S_IN];

		afe_priv->i2s_path[i].i2s_data[SNDRV_PCM_STREAM_PLAYBACK] =

			&mt2701_i2s_data[i][SNDRV_PCM_STREAM_PLAYBACK];

		afe_priv->i2s_path[i].i2s_data[SNDRV_PCM_STREAM_CAPTURE] =

			&mt2701_i2s_data[i][SNDRV_PCM_STREAM_CAPTURE];

	}



	afe->mtk_afe_hardware = &mt2701_afe_hardware;