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Commit ab3f02fc authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
Browse files

locking/arch: Add WRITE_ONCE() to set_mb() 



Since we assume set_mb() to result in a single store followed by a
full memory barrier, employ WRITE_ONCE().

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 6ce47fd9

arch/arm/include/asm/barrier.h

+1 −1
Original line number Diff line number Diff line
@@ -81,7 +81,7 @@ do { \ 
#define read_barrier_depends()		do { } while(0)

#define smp_read_barrier_depends()	do { } while(0)



#define set_mb(var, value)	do { var = value; smp_mb(); } while (0)

#define set_mb(var, value)	do { WRITE_ONCE(var, value); smp_mb(); } while (0)



#define smp_mb__before_atomic()	smp_mb()

#define smp_mb__after_atomic()	smp_mb()

arch/arm64/include/asm/barrier.h

+1 −1
Original line number Diff line number Diff line
@@ -114,7 +114,7 @@ do { \ 
#define read_barrier_depends()		do { } while(0)

#define smp_read_barrier_depends()	do { } while(0)



#define set_mb(var, value)	do { var = value; smp_mb(); } while (0)

#define set_mb(var, value)	do { WRITE_ONCE(var, value); smp_mb(); } while (0)

#define nop()		asm volatile("nop");



#define smp_mb__before_atomic()	smp_mb()

arch/ia64/include/asm/barrier.h

+1 −1
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ do { \ 
 * acquire vs release semantics but we can't discuss this stuff with

 * Linus just yet.  Grrr...

 */

#define set_mb(var, value)	do { (var) = (value); mb(); } while (0)

#define set_mb(var, value)	do { WRITE_ONCE(var, value); mb(); } while (0)



/*

 * The group barrier in front of the rsm & ssm are necessary to ensure

arch/metag/include/asm/barrier.h

+1 −1
Original line number Diff line number Diff line
@@ -84,7 +84,7 @@ static inline void fence(void) 
#define read_barrier_depends()		do { } while (0)

#define smp_read_barrier_depends()	do { } while (0)



#define set_mb(var, value) do { var = value; smp_mb(); } while (0)

#define set_mb(var, value) do { WRITE_ONCE(var, value); smp_mb(); } while (0)



#define smp_store_release(p, v)						\

do {									\

arch/mips/include/asm/barrier.h

+1 −1
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ 
#endif



#define set_mb(var, value) \

	do { var = value; smp_mb(); } while (0)

	do { WRITE_ONCE(var, value); smp_mb(); } while (0)



#define smp_llsc_mb()	__asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")