ARM: dts: msm: update PCIe LTR value to 150us for sdxlemur

On sdxlemur, PCIe L1.2 exit is about 150us. Therefore update PCIe
so that it will program all PCI devices LTR register with 150us.
Devices can use this value to deterine if L1.2 should be entered
or not based on their latency requirement.

Change-Id: Ife11959879bd7c09b9cbe256b5e46933124ad6b1