Loading qcom/qcs405-ion.dtsi 0 → 100644 +33 −0 Original line number Diff line number Diff line #include <dt-bindings/arm/msm/msm_ion_ids.h> &soc { qcom,ion { compatible = "qcom,msm-ion"; #address-cells = <1>; #size-cells = <0>; system_heap: qcom,ion-heap@25 { reg = <ION_SYSTEM_HEAP_ID>; qcom,ion-heap-type = "MSM_SYSTEM"; }; qcom,ion-heap@8 { /* CP_MM HEAP */ status = "disabled"; reg = <ION_CP_MM_HEAP_ID>; memory-region = <&secure_mem>; qcom,ion-heap-type = "SECURE_DMA"; }; qcom,ion-heap@27 { /* QSEECOM HEAP */ reg = <ION_QSECOM_HEAP_ID>; memory-region = <&qseecom_mem>; qcom,ion-heap-type = "DMA"; }; qcom,ion-heap@19 { /* QSEECOM TA HEAP */ reg = <ION_QSECOM_TA_HEAP_ID>; memory-region = <&qseecom_ta_mem>; qcom,ion-heap-type = "DMA"; }; }; }; qcom/qcs405.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -483,3 +483,4 @@ #include "qcs405-cpu.dtsi" #include "pms405-rpm-regulator.dtsi" #include "qcs405-regulator.dtsi" #include "qcs405-ion.dtsi" Loading
qcom/qcs405-ion.dtsi 0 → 100644 +33 −0 Original line number Diff line number Diff line #include <dt-bindings/arm/msm/msm_ion_ids.h> &soc { qcom,ion { compatible = "qcom,msm-ion"; #address-cells = <1>; #size-cells = <0>; system_heap: qcom,ion-heap@25 { reg = <ION_SYSTEM_HEAP_ID>; qcom,ion-heap-type = "MSM_SYSTEM"; }; qcom,ion-heap@8 { /* CP_MM HEAP */ status = "disabled"; reg = <ION_CP_MM_HEAP_ID>; memory-region = <&secure_mem>; qcom,ion-heap-type = "SECURE_DMA"; }; qcom,ion-heap@27 { /* QSEECOM HEAP */ reg = <ION_QSECOM_HEAP_ID>; memory-region = <&qseecom_mem>; qcom,ion-heap-type = "DMA"; }; qcom,ion-heap@19 { /* QSEECOM TA HEAP */ reg = <ION_QSECOM_TA_HEAP_ID>; memory-region = <&qseecom_ta_mem>; qcom,ion-heap-type = "DMA"; }; }; };
qcom/qcs405.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -483,3 +483,4 @@ #include "qcs405-cpu.dtsi" #include "pms405-rpm-regulator.dtsi" #include "qcs405-regulator.dtsi" #include "qcs405-ion.dtsi"