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Commit aaa36a97 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: Add initial VI support



This adds initial support for VI asics.  This
includes Iceland, Tonga, and Carrizo.  Our inital
focus as been Carrizo, so there are still gaps in
support for Tonga and Iceland, notably power
management.

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Acked-by: default avatarJammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a2e73f56
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+33 −5
Original line number Original line Diff line number Diff line
@@ -18,29 +18,57 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
	amdgpu_prime.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \
	amdgpu_prime.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \
	amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o
	amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o


# add asic specific block
amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o gmc_v7_0.o cik_ih.o kv_smc.o kv_dpm.o \
amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o gmc_v7_0.o cik_ih.o kv_smc.o kv_dpm.o \
	ci_smc.o ci_dpm.o dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o
	ci_smc.o ci_dpm.o dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o


amdgpu-y += \
	vi.o

# add GMC block
amdgpu-y += \
	gmc_v8_0.o

# add IH block
# add IH block
amdgpu-y += \
amdgpu-y += \
	amdgpu_irq.o \
	amdgpu_irq.o \
	amdgpu_ih.o
	amdgpu_ih.o \
	iceland_ih.o \
	tonga_ih.o \
	cz_ih.o


# add SMC block
# add SMC block
amdgpu-y += \
amdgpu-y += \
	amdgpu_dpm.o
	amdgpu_dpm.o \
	cz_smc.o cz_dpm.o \
	tonga_smc.o tonga_dpm.o \
	iceland_smc.o iceland_dpm.o

# add DCE block
amdgpu-y += \
	dce_v10_0.o \
	dce_v11_0.o


# add GFX block
# add GFX block
amdgpu-y += \
amdgpu-y += \
	amdgpu_gfx.o
	amdgpu_gfx.o \
	gfx_v8_0.o

# add async DMA block
amdgpu-y += \
	sdma_v2_4.o \
	sdma_v3_0.o


# add UVD block
# add UVD block
amdgpu-y += \
amdgpu-y += \
	amdgpu_uvd.o
	amdgpu_uvd.o \
	uvd_v5_0.o \
	uvd_v6_0.o


# add VCE block
# add VCE block
amdgpu-y += \
amdgpu-y += \
	amdgpu_vce.o
	amdgpu_vce.o \
	vce_v3_0.o


amdgpu-$(CONFIG_COMPAT) += amdgpu_ioc32.o
amdgpu-$(CONFIG_COMPAT) += amdgpu_ioc32.o
amdgpu-$(CONFIG_VGA_SWITCHEROO) += amdgpu_atpx_handler.o
amdgpu-$(CONFIG_VGA_SWITCHEROO) += amdgpu_atpx_handler.o
+14 −1
Original line number Original line Diff line number Diff line
@@ -41,6 +41,7 @@
#ifdef CONFIG_DRM_AMDGPU_CIK
#ifdef CONFIG_DRM_AMDGPU_CIK
#include "cik.h"
#include "cik.h"
#endif
#endif
#include "vi.h"
#include "bif/bif_4_1_d.h"
#include "bif/bif_4_1_d.h"


static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev);
static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev);
@@ -1154,9 +1155,21 @@ int amdgpu_ip_block_version_cmp(struct amdgpu_device *adev,


static int amdgpu_early_init(struct amdgpu_device *adev)
static int amdgpu_early_init(struct amdgpu_device *adev)
{
{
	int i, r = -EINVAL;
	int i, r;


	switch (adev->asic_type) {
	switch (adev->asic_type) {
	case CHIP_TOPAZ:
	case CHIP_TONGA:
	case CHIP_CARRIZO:
		if (adev->asic_type == CHIP_CARRIZO)
			adev->family = AMDGPU_FAMILY_CZ;
		else
			adev->family = AMDGPU_FAMILY_VI;

		r = vi_set_ip_blocks(adev);
		if (r)
			return r;
		break;
#ifdef CONFIG_DRM_AMDGPU_CIK
#ifdef CONFIG_DRM_AMDGPU_CIK
	case CHIP_BONAIRE:
	case CHIP_BONAIRE:
	case CHIP_HAWAII:
	case CHIP_HAWAII:
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