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Commit aa8e5068 authored by Sherry Sun's avatar Sherry Sun Committed by Greg Kroah-Hartman
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tty: serial: fsl_lpuart: avoid checking for transfer complete when...


tty: serial: fsl_lpuart: avoid checking for transfer complete when UARTCTRL_SBK is asserted in lpuart32_tx_empty

commit 9425914f3de6febbd6250395f56c8279676d9c3c upstream.

According to LPUART RM, Transmission Complete Flag becomes 0 if queuing
a break character by writing 1 to CTRL[SBK], so here need to avoid
checking for transmission complete when UARTCTRL_SBK is asserted,
otherwise the lpuart32_tx_empty may never get TIOCSER_TEMT.

Commit 2411fd94ceaa("tty: serial: fsl_lpuart: skip waiting for
transmission complete when UARTCTRL_SBK is asserted") only fix it in
lpuart32_set_termios(), here also fix it in lpuart32_tx_empty().

Fixes: 380c966c ("tty: serial: fsl_lpuart: add 32-bit register interface support")
Cc: stable <stable@kernel.org>
Signed-off-by: default avatarSherry Sun <sherry.sun@nxp.com>
Link: https://lore.kernel.org/r/20230323054415.20363-1-sherry.sun@nxp.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent aabba444
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+7 −1
Original line number Diff line number Diff line
@@ -807,11 +807,17 @@ static unsigned int lpuart32_tx_empty(struct uart_port *port)
			struct lpuart_port, port);
	unsigned long stat = lpuart32_read(port, UARTSTAT);
	unsigned long sfifo = lpuart32_read(port, UARTFIFO);
	unsigned long ctrl = lpuart32_read(port, UARTCTRL);

	if (sport->dma_tx_in_progress)
		return 0;

	if (stat & UARTSTAT_TC && sfifo & UARTFIFO_TXEMPT)
	/*
	 * LPUART Transmission Complete Flag may never be set while queuing a break
	 * character, so avoid checking for transmission complete when UARTCTRL_SBK
	 * is asserted.
	 */
	if ((stat & UARTSTAT_TC && sfifo & UARTFIFO_TXEMPT) || ctrl & UARTCTRL_SBK)
		return TIOCSER_TEMT;

	return 0;