Unverified Commit aa54c1c9 authored Dec 26, 2018 by Angelo Dureghello Committed by Mark Brown Jan 07, 2019

spi: fix initial SPI_SR value in spi-fsl-dspi



On ColdFire mcf54418, using DSPI_DMA_MODE mode, spi transfers
at first boot stage are not succeding:

m25p80 spi0.1: unrecognized JEDEC id bytes: 00, 00, 00

The reason is the SPI_SR initial value set by the driver, that
is not clearing (not setting to 1) the RF_DF flag. After a tour
on the dspi hw modules that use this driver(Vybrid, ColdFire and
ls1021a) a better init value for SR register has been set.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Mark Brown <broonie@kernel.org>

parent a15dc3d6

drivers/spi/spi-fsl-dspi.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -67,7 +67,7 @@
		#define SPI_SR 0x2c
		#define SPI_SR_EOQF 0x10000000
		#define SPI_SR_TCFQF 0x80000000
		#define SPI_SR_CLEAR 0xdaad0000
		#define SPI_SR_CLEAR 0x9aaf0000

		#define SPI_RSER_TFFFE BIT(25)
		#define SPI_RSER_TFFFD BIT(24)