Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

  - 'css_for_each_descendant_post'

  - 'css_for_each_descendant_pre'

  - 'device_for_each_child_node'

  - 'dma_fence_chain_for_each'

  - 'drm_atomic_crtc_for_each_plane'

  - 'drm_atomic_crtc_state_for_each_plane'

  - 'drm_atomic_crtc_state_for_each_plane_state'

  - 'drm_atomic_for_each_plane_damage'

  - 'drm_client_for_each_connector_iter'

  - 'drm_client_for_each_modeset'

  - 'drm_connector_for_each_possible_encoder'

  - 'drm_for_each_connector_iter'

  - 'drm_for_each_crtc'

  - 'drm_mm_for_each_node_in_range'

  - 'drm_mm_for_each_node_safe'

  - 'flow_action_for_each'

  - 'for_each_active_dev_scope'

  - 'for_each_active_drhd_unit'

  - 'for_each_active_iommu'

  - 'for_each_available_child_of_node'

  - 'for_each_cpu_not'

  - 'for_each_cpu_wrap'

  - 'for_each_dev_addr'

  - 'for_each_dev_scope'

  - 'for_each_displayid_db'

  - 'for_each_dma_cap_mask'

  - 'for_each_dpcm_be'

  - 'for_each_dpcm_be_rollback'

  - 'for_each_evictable_lru'

  - 'for_each_fib6_node_rt_rcu'

  - 'for_each_fib6_walker_rt'

  - 'for_each_free_mem_pfn_range_in_zone'

  - 'for_each_free_mem_pfn_range_in_zone_from'

  - 'for_each_free_mem_range'

  - 'for_each_free_mem_range_reverse'

  - 'for_each_func_rsrc'

  - 'for_each_ip_tunnel_rcu'

  - 'for_each_irq_nr'

  - 'for_each_link_codecs'

  - 'for_each_link_platforms'

  - 'for_each_lru'

  - 'for_each_matching_node'

  - 'for_each_matching_node_and_match'

  - 'ide_port_for_each_present_dev'

  - 'idr_for_each_entry'

  - 'idr_for_each_entry_continue'

  - 'idr_for_each_entry_continue_ul'

  - 'idr_for_each_entry_ul'

  - 'in_dev_for_each_ifa_rcu'

  - 'in_dev_for_each_ifa_rtnl'

  - 'inet_bind_bucket_for_each'

  - 'inet_lhash2_for_each_icsk_rcu'

  - 'key_for_each'

  - 'media_device_for_each_intf'

  - 'media_device_for_each_link'

  - 'media_device_for_each_pad'

  - 'mp_bvec_for_each_page'

  - 'mp_bvec_for_each_segment'

  - 'nanddev_io_for_each_page'

  - 'netdev_for_each_lower_dev'

  - 'netdev_for_each_lower_private'

  - 'radix_tree_for_each_slot'

  - 'radix_tree_for_each_tagged'

  - 'rbtree_postorder_for_each_entry_safe'

  - 'rdma_for_each_block'

  - 'rdma_for_each_port'

  - 'resource_list_for_each_entry'

  - 'resource_list_for_each_entry_safe'

  - 'rhl_for_each_entry_rcu'

  - 'rhl_for_each_rcu'

  - 'rht_for_each'

  - 'rht_for_each_from'

  - 'rht_for_each_entry'

  - 'rht_for_each_entry_from'

  - 'rht_for_each_entry_rcu'

  - 'rht_for_each_entry_rcu_from'

  - 'rht_for_each_entry_safe'

  - 'rht_for_each_from'

  - 'rht_for_each_rcu'

  - 'rht_for_each_rcu_from'

  - '__rq_for_each_bio'

The initial response team sets up an encrypted mailing-list or repurposes

an existing one if appropriate. The disclosing party should provide a list

of contacts for all other parties who have already been, or should be

of contacts for all other parties who have already been, or should be,

informed about the issue. The response team contacts these parties so they

can name experts who should be subscribed to the mailing-list.

  AMD

  IBM

  Intel

  Qualcomm

  Qualcomm	Trilok Soni <tsoni@codeaurora.org>

  Microsoft

  Microsoft	Sasha Levin <sashal@kernel.org>

  VMware

  XEN

  Xen		Andrew Cooper <andrew.cooper3@citrix.com>

  Canonical	Tyler Hicks <tyhicks@canonical.com>

  Debian	Ben Hutchings <ben@decadent.org.uk>

  SUSE		Jiri Kosina <jkosina@suse.cz>

  Amazon

  Google

  ============== ========================================================

  Google	Kees Cook <keescook@chromium.org>

  ============= ========================================================

If you want your organization to be added to the ambassadors list, please

contact the hardware security team. The nominated ambassador has to

	u32 res1  = 0;		  /* Reserved */

	u64 res2  = 0;    	  /* Reserved */

	u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */

	u32 res3;		  /* Reserved for additional RISC-V specific header */

	u32 magic2 = 0x56534905;  /* Magic number 2, little endian, "RSC\x05" */

	u32 res4;		  /* Reserved for PE COFF offset */

This header format is compliant with PE/COFF header and largely inspired from

	Bits 16:31 - Major version

  This preserves compatibility across newer and older version of the header.

  The current version is defined as 0.1.

  The current version is defined as 0.2.

- res3 is reserved for offset to any other additional fields. This makes the

  header extendible in future. One example would be to accommodate ISA

  extension for RISC-V in future. For current version, it is set to be zero.

- The "magic" field is deprecated as of version 0.2.  In a future

  release, it may be removed.  This originally should have matched up

  with the ARM64 header "magic" field, but unfortunately does not.

  The "magic2" field replaces it, matching up with the ARM64 header.

- In current header, the flag field has only one field.

- In current header, the flags field has only one field.

	Bit 0: Kernel endianness. 1 if BE, 0 if LE.

- Image size is mandatory for boot loader to load kernel image. Booting will

F:	include/uapi/linux/fsmap.h

XILINX AXI ETHERNET DRIVER

M:	Anirudha Sarangi <anirudh@xilinx.com>

M:	John Linn <John.Linn@xilinx.com>

M:	Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>

S:	Maintained

F:	drivers/net/ethernet/xilinx/xilinx_axienet*

VERSION = 5

PATCHLEVEL = 3

SUBLEVEL = 0

EXTRAVERSION = -rc7

EXTRAVERSION = -rc8

NAME = Bobtail Squid

# *DOCUMENTATION*