Merge "ARM: dts: msm: Enable smmu s1 for blsp bam on sdxlemur V2"

	qcom,msm-id = <458 0x20000>, <483 0x20000>, <509 0x20000>;

};

/* Overriding the BAM node to enable SMMU S1 support in sdxlemur V2

 * Adding i2c SID's in BAM node, as descriptors buffers for i2c

 * usecase are allocated in BAM DMA driver.

 */

&dma_blsp1 {

	iommus = <&apps_smmu 0x148 0x1>,

		<&apps_smmu 0x14a 0x1>,

		<&apps_smmu 0x14c 0x1>,

		<&apps_smmu 0x14e 0x1>;

	qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;

	qcom,iommu-geometry = <0x40000000 0x10000000>;

	qcom,iommu-dma = "fastmap";

};

&i2c_1 {

	iommus = <&apps_smmu 0x148 0x1>;

	qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;