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Commit a965033f authored by Kai Xing's avatar Kai Xing
Browse files

disp: msm: dsi: Add DSI PLL support for 7nm_v4_1 arch 



Add DSI PLL support for 7nm_v4_1 architecture

Change-Id: I4adf1ec6ed40fea16aa80579d34a3c918faa8478
Signed-off-by: default avatarKai Xing <quic_kxing@quicinc.com>
parent 6a0f0b0f

config/konadisp.conf

+1 −0
Original line number Diff line number Diff line
@@ -11,3 +11,4 @@ export CONFIG_QCOM_MDSS_PLL=y 
export CONFIG_MSM_SDE_ROTATOR=y

export CONFIG_MSM_SDE_ROTATOR_EVTLOG_DEBUG=y

export CONFIG_DRM_SDE_RSC=y

export CONFIG_DISPLAY_BUILD=y

msm/dsi/dsi_pll.c

+5 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 *

 * Copyright (c) 2020, The Linux Foundation. All rights reserved.

 */
@@ -21,6 +23,7 @@ static int dsi_pll_clock_register(struct platform_device *pdev, 


	switch (pll_res->pll_revision) {

	case DSI_PLL_5NM:

	case DSI_PLL_7NM_V4_1:

		rc = dsi_pll_clock_register_5nm(pdev, pll_res);

		break;

	case DSI_PLL_10NM:
@@ -150,6 +153,8 @@ int dsi_pll_init(struct platform_device *pdev, struct dsi_pll_resource **pll) 


	if (!strcmp(label, "dsi_pll_5nm"))

		pll_res->pll_revision = DSI_PLL_5NM;

	else if (!strcmp(label, "dsi_pll_7nm_v4_1"))

		pll_res->pll_revision = DSI_PLL_7NM_V4_1;

	else if (!strcmp(label, "dsi_pll_10nm"))

		pll_res->pll_revision = DSI_PLL_10NM;

	else

msm/dsi/dsi_pll.h

+3 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 *

 * Copyright (c) 2020, The Linux Foundation. All rights reserved.

 */
@@ -54,6 +56,7 @@ struct lpfr_cfg { 


enum {

	DSI_PLL_5NM,

	DSI_PLL_7NM_V4_1,

	DSI_PLL_10NM,

	DSI_UNKNOWN_PLL,

};

msm/dsi/dsi_pll_5nm.c

+13 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 *

 * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.

 */
@@ -291,6 +293,13 @@ static inline bool dsi_pll_5nm_is_hw_revision( 
		true : false;

}



static inline bool dsi_pll_7nm_v4_1_is_hw_revision(

		struct dsi_pll_resource *rsc)

{

	return (rsc->pll_revision == DSI_PLL_7NM_V4_1) ?

		true : false;

}



static inline int pll_reg_read(void *context, unsigned int reg,

					unsigned int *val)

{
@@ -2591,7 +2600,8 @@ int dsi_pll_clock_register_5nm(struct platform_device *pdev, 
		dsi0pll_vco_clk.priv = pll_res;

		dsi0pll_shadow_vco_clk.priv = pll_res;



		if (dsi_pll_5nm_is_hw_revision(pll_res)) {

		if (dsi_pll_5nm_is_hw_revision(pll_res) ||

				dsi_pll_7nm_v4_1_is_hw_revision(pll_res)) {

			dsi0pll_vco_clk.min_rate = 600000000;

			dsi0pll_vco_clk.max_rate = 5000000000;

			dsi0pll_shadow_vco_clk.min_rate = 600000000;
@@ -2660,7 +2670,8 @@ int dsi_pll_clock_register_5nm(struct platform_device *pdev, 
		dsi1pll_vco_clk.priv = pll_res;

		dsi1pll_shadow_vco_clk.priv = pll_res;



		if (dsi_pll_5nm_is_hw_revision(pll_res)) {

		if (dsi_pll_5nm_is_hw_revision(pll_res) ||

				dsi_pll_7nm_v4_1_is_hw_revision(pll_res)) {

			dsi1pll_vco_clk.min_rate = 600000000;

			dsi1pll_vco_clk.max_rate = 5000000000;

			dsi1pll_shadow_vco_clk.min_rate = 600000000;