Loading arch/mips/mm/c-r4k.c +2 −0 Original line number Diff line number Diff line Loading @@ -1012,8 +1012,10 @@ static void __init probe_pcache(void) * with that for us so we don't need to take care ourselves. */ switch (c->cputype) { case CPU_20KC: case CPU_R10000: case CPU_R12000: case CPU_SB1: break; case CPU_24K: if (!(read_c0_config7() & (1 << 16))) Loading Loading
arch/mips/mm/c-r4k.c +2 −0 Original line number Diff line number Diff line Loading @@ -1012,8 +1012,10 @@ static void __init probe_pcache(void) * with that for us so we don't need to take care ourselves. */ switch (c->cputype) { case CPU_20KC: case CPU_R10000: case CPU_R12000: case CPU_SB1: break; case CPU_24K: if (!(read_c0_config7() & (1 << 16))) Loading