Loading arch/arm/mach-mx25/devices-imx25.h +7 −0 Original line number Diff line number Diff line Loading @@ -9,5 +9,12 @@ #include <mach/mx25.h> #include <mach/devices-common.h> #define imx25_add_imx_i2c0(pdata) \ imx_add_imx_i2c(0, MX25_I2C1_BASE_ADDR, SZ_16K, MX25_INT_I2C1, pdata) #define imx25_add_imx_i2c1(pdata) \ imx_add_imx_i2c(1, MX25_I2C2_BASE_ADDR, SZ_16K, MX25_INT_I2C2, pdata) #define imx25_add_imx_i2c2(pdata) \ imx_add_imx_i2c(2, MX25_I2C3_BASE_ADDR, SZ_16K, MX25_INT_I2C3, pdata) #define imx25_add_mxc_nand(pdata) \ imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata) arch/arm/mach-mx25/devices.c +0 −57 Original line number Diff line number Diff line Loading @@ -333,63 +333,6 @@ struct platform_device mxc_pwm_device3 = { .resource = mxc_pwm_resources3, }; static struct resource mxc_i2c_1_resources[] = { { .start = 0x43f80000, .end = 0x43f83fff, .flags = IORESOURCE_MEM, }, { .start = 3, .end = 3, .flags = IORESOURCE_IRQ, } }; struct platform_device mxc_i2c_device0 = { .name = "imx-i2c", .id = 0, .num_resources = ARRAY_SIZE(mxc_i2c_1_resources), .resource = mxc_i2c_1_resources, }; static struct resource mxc_i2c_2_resources[] = { { .start = 0x43f98000, .end = 0x43f9bfff, .flags = IORESOURCE_MEM, }, { .start = 4, .end = 4, .flags = IORESOURCE_IRQ, } }; struct platform_device mxc_i2c_device1 = { .name = "imx-i2c", .id = 1, .num_resources = ARRAY_SIZE(mxc_i2c_2_resources), .resource = mxc_i2c_2_resources, }; static struct resource mxc_i2c_3_resources[] = { { .start = 0x43f84000, .end = 0x43f87fff, .flags = IORESOURCE_MEM, }, { .start = 10, .end = 10, .flags = IORESOURCE_IRQ, } }; struct platform_device mxc_i2c_device2 = { .name = "imx-i2c", .id = 2, .num_resources = ARRAY_SIZE(mxc_i2c_3_resources), .resource = mxc_i2c_3_resources, }; static struct mxc_gpio_port imx_gpio_ports[] = { { .chip.label = "gpio-0", Loading arch/arm/mach-mx25/devices.h +0 −3 Original line number Diff line number Diff line Loading @@ -14,9 +14,6 @@ extern struct platform_device mxc_pwm_device1; extern struct platform_device mxc_pwm_device2; extern struct platform_device mxc_pwm_device3; extern struct platform_device mxc_keypad_device; extern struct platform_device mxc_i2c_device0; extern struct platform_device mxc_i2c_device1; extern struct platform_device mxc_i2c_device2; extern struct platform_device mx25_fec_device; extern struct platform_device mx25_rtc_device; extern struct platform_device mx25_fb_device; Loading arch/arm/plat-mxc/include/mach/mx25.h +10 −4 Original line number Diff line number Diff line Loading @@ -11,6 +11,9 @@ #define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000 #define MX25_AVIC_SIZE SZ_1M #define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000) #define MX25_I2C3_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x84000) #define MX25_I2C2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x98000) #define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000) #define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000) Loading @@ -35,6 +38,9 @@ #define MX25_DRYICE_BASE_ADDR 0x53ffc000 #define MX25_LCDC_BASE_ADDR 0x53fbc000 #define MX25_INT_I2C1 3 #define MX25_INT_I2C2 4 #define MX25_INT_I2C3 10 #define MX25_INT_DRYICE 25 #define MX25_INT_FEC 57 #define MX25_INT_NANDFC 33 Loading Loading
arch/arm/mach-mx25/devices-imx25.h +7 −0 Original line number Diff line number Diff line Loading @@ -9,5 +9,12 @@ #include <mach/mx25.h> #include <mach/devices-common.h> #define imx25_add_imx_i2c0(pdata) \ imx_add_imx_i2c(0, MX25_I2C1_BASE_ADDR, SZ_16K, MX25_INT_I2C1, pdata) #define imx25_add_imx_i2c1(pdata) \ imx_add_imx_i2c(1, MX25_I2C2_BASE_ADDR, SZ_16K, MX25_INT_I2C2, pdata) #define imx25_add_imx_i2c2(pdata) \ imx_add_imx_i2c(2, MX25_I2C3_BASE_ADDR, SZ_16K, MX25_INT_I2C3, pdata) #define imx25_add_mxc_nand(pdata) \ imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata)
arch/arm/mach-mx25/devices.c +0 −57 Original line number Diff line number Diff line Loading @@ -333,63 +333,6 @@ struct platform_device mxc_pwm_device3 = { .resource = mxc_pwm_resources3, }; static struct resource mxc_i2c_1_resources[] = { { .start = 0x43f80000, .end = 0x43f83fff, .flags = IORESOURCE_MEM, }, { .start = 3, .end = 3, .flags = IORESOURCE_IRQ, } }; struct platform_device mxc_i2c_device0 = { .name = "imx-i2c", .id = 0, .num_resources = ARRAY_SIZE(mxc_i2c_1_resources), .resource = mxc_i2c_1_resources, }; static struct resource mxc_i2c_2_resources[] = { { .start = 0x43f98000, .end = 0x43f9bfff, .flags = IORESOURCE_MEM, }, { .start = 4, .end = 4, .flags = IORESOURCE_IRQ, } }; struct platform_device mxc_i2c_device1 = { .name = "imx-i2c", .id = 1, .num_resources = ARRAY_SIZE(mxc_i2c_2_resources), .resource = mxc_i2c_2_resources, }; static struct resource mxc_i2c_3_resources[] = { { .start = 0x43f84000, .end = 0x43f87fff, .flags = IORESOURCE_MEM, }, { .start = 10, .end = 10, .flags = IORESOURCE_IRQ, } }; struct platform_device mxc_i2c_device2 = { .name = "imx-i2c", .id = 2, .num_resources = ARRAY_SIZE(mxc_i2c_3_resources), .resource = mxc_i2c_3_resources, }; static struct mxc_gpio_port imx_gpio_ports[] = { { .chip.label = "gpio-0", Loading
arch/arm/mach-mx25/devices.h +0 −3 Original line number Diff line number Diff line Loading @@ -14,9 +14,6 @@ extern struct platform_device mxc_pwm_device1; extern struct platform_device mxc_pwm_device2; extern struct platform_device mxc_pwm_device3; extern struct platform_device mxc_keypad_device; extern struct platform_device mxc_i2c_device0; extern struct platform_device mxc_i2c_device1; extern struct platform_device mxc_i2c_device2; extern struct platform_device mx25_fec_device; extern struct platform_device mx25_rtc_device; extern struct platform_device mx25_fb_device; Loading
arch/arm/plat-mxc/include/mach/mx25.h +10 −4 Original line number Diff line number Diff line Loading @@ -11,6 +11,9 @@ #define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000 #define MX25_AVIC_SIZE SZ_1M #define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000) #define MX25_I2C3_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x84000) #define MX25_I2C2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x98000) #define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000) #define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000) Loading @@ -35,6 +38,9 @@ #define MX25_DRYICE_BASE_ADDR 0x53ffc000 #define MX25_LCDC_BASE_ADDR 0x53fbc000 #define MX25_INT_I2C1 3 #define MX25_INT_I2C2 4 #define MX25_INT_I2C3 10 #define MX25_INT_DRYICE 25 #define MX25_INT_FEC 57 #define MX25_INT_NANDFC 33 Loading