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Unverified Commit a88eceb1 authored by Ludovic Barre's avatar Ludovic Barre Committed by Mark Brown
Browse files

spi: stm32-qspi: add spi_master_put in release function 



This patch adds spi_master_put in release function
to drop the controller's refcount.

Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent cbd66c62

drivers/spi/spi-stm32-qspi.c

+28 −18
Original line number Diff line number Diff line
@@ -93,6 +93,7 @@ struct stm32_qspi_flash { 


struct stm32_qspi {

	struct device *dev;

	struct spi_controller *ctrl;

	void __iomem *io_base;

	void __iomem *mm_base;

	resource_size_t mm_size;
@@ -400,6 +401,7 @@ static void stm32_qspi_release(struct stm32_qspi *qspi) 
	writel_relaxed(0, qspi->io_base + QSPI_CR);

	mutex_destroy(&qspi->lock);

	clk_disable_unprepare(qspi->clk);

	spi_master_put(qspi->ctrl);

}



static int stm32_qspi_probe(struct platform_device *pdev)
@@ -416,43 +418,54 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
		return -ENOMEM;



	qspi = spi_controller_get_devdata(ctrl);

	qspi->ctrl = ctrl;



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi");

	qspi->io_base = devm_ioremap_resource(dev, res);

	if (IS_ERR(qspi->io_base))

		return PTR_ERR(qspi->io_base);

	if (IS_ERR(qspi->io_base)) {

		ret = PTR_ERR(qspi->io_base);

		goto err;

	}



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi_mm");

	qspi->mm_base = devm_ioremap_resource(dev, res);

	if (IS_ERR(qspi->mm_base))

		return PTR_ERR(qspi->mm_base);

	if (IS_ERR(qspi->mm_base)) {

		ret = PTR_ERR(qspi->mm_base);

		goto err;

	}



	qspi->mm_size = resource_size(res);

	if (qspi->mm_size > STM32_QSPI_MAX_MMAP_SZ)

		return -EINVAL;

	if (qspi->mm_size > STM32_QSPI_MAX_MMAP_SZ) {

		ret = -EINVAL;

		goto err;

	}



	irq = platform_get_irq(pdev, 0);

	ret = devm_request_irq(dev, irq, stm32_qspi_irq, 0,

			       dev_name(dev), qspi);

	if (ret) {

		dev_err(dev, "failed to request irq\n");

		return ret;

		goto err;

	}



	init_completion(&qspi->data_completion);



	qspi->clk = devm_clk_get(dev, NULL);

	if (IS_ERR(qspi->clk))

		return PTR_ERR(qspi->clk);

	if (IS_ERR(qspi->clk)) {

		ret = PTR_ERR(qspi->clk);

		goto err;

	}



	qspi->clk_rate = clk_get_rate(qspi->clk);

	if (!qspi->clk_rate)

		return -EINVAL;

	if (!qspi->clk_rate) {

		ret = -EINVAL;

		goto err;

	}



	ret = clk_prepare_enable(qspi->clk);

	if (ret) {

		dev_err(dev, "can not enable the clock\n");

		return ret;

		goto err;

	}



	rstc = devm_reset_control_get_exclusive(dev, NULL);
@@ -475,14 +488,11 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
	ctrl->dev.of_node = dev->of_node;



	ret = devm_spi_register_master(dev, ctrl);

	if (ret)

		goto err_spi_register;



	if (!ret)

		return 0;



err_spi_register:

err:

	stm32_qspi_release(qspi);



	return ret;

}