Merge "msm: camera: isp: Support for SFE IRQ handling" into camera-kernel.lnx.4.0 (a7a6720c) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_sfe_hw_intf.h

+59 −8

Original line number	Diff line number	Diff line
		@@ -7,6 +7,7 @@
		#define _CAM_SFE_HW_INTF_H_

		#include "cam_isp_hw.h"
		#include "cam_isp_hw_mgr_intf.h"

		#define SFE_CORE_BASE_IDX 0
		#define SFE_RT_CDM_BASE_IDX 1
		@@ -48,6 +49,11 @@ enum cam_sfe_bus_irq_regs {
		CAM_SFE_BUS_IRQ_REGISTERS_MAX,
		};

		enum cam_sfe_bus_rd_irq_regs {
		CAM_SFE_IRQ_BUS_RD_REG_STATUS0,
		CAM_SFE_BUS_RD_IRQ_REGISTERS_MAX,
		};

		/*
		* struct cam_sfe_fe_update_args:
		*
		@@ -83,33 +89,78 @@ struct cam_sfe_core_config_args {
		};

		/*
		* struct cam_sfe_irq_evt_payload:
		* struct cam_sfe_top_irq_evt_payload:
		*
		* @Brief: This structure is used to save payload for IRQ
		* related to SFE resources
		* related to SFE top resource
		*
		* @list: list_head node for the payload
		* @core_index: Index of SFE HW that generated this IRQ event
		* @evt_id: IRQ event
		* @irq_reg_val: IRQ and Error register values, read when IRQ was
		* handled
		* @bus_irq_val Bus irq register status
		* @violation_status ccif violation status
		* @error_type: Identify different errors
		* @ts: Timestamp
		*/
		struct cam_sfe_top_irq_evt_payload {
		struct list_head list;
		uint32_t core_index;
		uint32_t evt_id;
		uint32_t irq_reg_val[CAM_SFE_IRQ_REGISTERS_MAX];
		uint32_t violation_status;
		uint32_t error_type;
		struct cam_isp_timestamp ts;
		};

		/*
		* struct cam_sfe_bus_wr_irq_evt_payload:
		*
		* @Brief: This structure is used to save payload for IRQ
		* BUS related to SFE resources
		*
		* @list: list_head node for the payload
		* @core_index: Index of SFE HW that generated this IRQ event
		* @irq_reg_val Bus irq register status
		* @ccif_violation_status ccif violation status
		* @overflow_status bus overflow status
		* @image_size_vio_sts image size violations status
		* @error_type: Identify different errors
		* @evt_id: IRQ event
		* @ts: Timestamp
		*/
		struct cam_sfe_irq_evt_payload {
		struct cam_sfe_bus_wr_irq_evt_payload {
		struct list_head list;
		uint32_t core_index;
		uint32_t evt_id;
		uint32_t irq_reg_val[CAM_SFE_IRQ_REGISTERS_MAX];
		uint32_t bus_irq_val[CAM_SFE_BUS_IRQ_REGISTERS_MAX];
		uint32_t irq_reg_val[CAM_SFE_BUS_IRQ_REGISTERS_MAX];
		uint32_t ccif_violation_status;
		uint32_t overflow_status;
		uint32_t image_size_vio_sts;
		uint32_t image_size_violation_status;
		uint32_t error_type;
		uint32_t evt_id;
		struct cam_isp_timestamp ts;
		};

		/*
		* struct cam_sfe_bus_rd_irq_evt_payload:
		*
		* @Brief: This structure is used to save payload for IRQ
		* BUS related to SFE resources
		*
		* @list: list_head node for the payload
		* @irq_reg_val Bus irq register status
		* @constraint_violation constraint violation
		* @error_type: Identify different errors
		* @evt_id: IRQ event
		* @ts: Timestamp
		*/
		struct cam_sfe_bus_rd_irq_evt_payload {
		struct list_head list;
		uint32_t irq_reg_val[
		CAM_SFE_BUS_RD_IRQ_REGISTERS_MAX];
		uint32_t constraint_violation;
		uint32_t error_type;
		uint32_t evt_id;
		struct cam_isp_timestamp ts;
		};

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/cam_sfe680.h

+46 −2

Original line number	Diff line number	Diff line
		@@ -128,6 +128,14 @@ static struct cam_sfe_top_hw_info sfe680_top_hw_info = {
		},
		};

		static struct cam_irq_register_set sfe680_bus_rd_irq_reg[1] = {
		{
		.mask_reg_offset = 0x00000404,
		.clear_reg_offset = 0x00000408,
		.status_reg_offset = 0x00000410,
		},
		};

		static struct cam_sfe_bus_rd_hw_info sfe680_bus_rd_hw_info = {
		.common_reg = {
		.hw_version = 0x00000400,
		@@ -136,6 +144,13 @@ static struct cam_sfe_bus_rd_hw_info sfe680_bus_rd_hw_info = {
		.input_if_cmd = 0x00000414,
		.test_bus_ctrl = 0x0000042C,
		.security_cfg = 0x00000420,
		.cons_violation_status = 0x00000434,
		.irq_reg_info = {
		.num_registers = 1,
		.irq_reg_set = sfe680_bus_rd_irq_reg,
		.global_clear_offset = 0x0000040C,
		.global_clear_bitmask = 0x00000001,
		},
		},
		.num_client = 3,
		.bus_client_reg = {
		@@ -191,6 +206,14 @@ static struct cam_sfe_bus_rd_hw_info sfe680_bus_rd_hw_info = {
		.top_irq_shift = 0x1,
		};

		static struct cam_irq_register_set sfe680_bus_wr_irq_reg[1] = {
		{
		.mask_reg_offset = 0x00000818,
		.clear_reg_offset = 0x00000820,
		.status_reg_offset = 0x00000828,
		},
		};

		static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
		.common_reg = {
		.hw_version = 0x00000800,
		@@ -211,7 +234,13 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
		.debug_status_top_cfg = 0x000008D4,
		.debug_status_top = 0x000008D8,
		.test_bus_ctrl = 0x000008DC,
		.top_irq_mask_0 = 0x00000818,
		.top_irq_mask_0 = 0x00000020,
		.irq_reg_info = {
		.num_registers = 1,
		.irq_reg_set = sfe680_bus_wr_irq_reg,
		.global_clear_offset = 0x00000830,
		.global_clear_bitmask = 0x00000001,
		},
		},
		.num_client = 13,
		.bus_client_reg = {
		@@ -679,8 +708,23 @@ static struct cam_sfe_bus_wr_hw_info sfe680_bus_wr_hw_info = {
		.top_irq_shift = 0x0,
		};

		static struct cam_irq_register_set sfe680_top_irq_reg_set[1] = {
		{
		.mask_reg_offset = 0x00000020,
		.clear_reg_offset = 0x00000024,
		.status_reg_offset = 0x00000028,
		},
		};

		static struct cam_irq_controller_reg_info sfe680_top_irq_reg_info = {
		.num_registers = 1,
		.irq_reg_set = sfe680_top_irq_reg_set,
		.global_clear_offset = 0x0000001C,
		.global_clear_bitmask = 0x00000001,
		};

		struct cam_sfe_hw_info cam_sfe680_hw_info = {
		.irq_reg_info = NULL,
		.irq_reg_info = &sfe680_top_irq_reg_info,

		.bus_wr_version = CAM_SFE_BUS_WR_VER_1_0,
		.bus_wr_hw_info = &sfe680_bus_wr_hw_info,

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/cam_sfe_core.c

+26 −9

Original line number	Diff line number	Diff line
		@@ -407,17 +407,28 @@ int cam_sfe_core_init(
		struct cam_hw_intf *hw_intf,
		struct cam_sfe_hw_info *sfe_hw_info)
		{
		int rc;
		int rc = -EINVAL;

		rc = cam_irq_controller_init(drv_name,
		CAM_SOC_GET_REG_MAP_START(soc_info, SFE_CORE_BASE_IDX),
		sfe_hw_info->irq_reg_info, &core_info->sfe_irq_controller,
		true);
		if (rc) {
		CAM_ERR(CAM_SFE, "SFE irq controller init failed");
		return rc;
		}

		rc = cam_sfe_top_init(sfe_hw_info->top_version, soc_info, hw_intf,
		sfe_hw_info->top_hw_info, &core_info->sfe_top);
		sfe_hw_info->top_hw_info, core_info->sfe_irq_controller,
		&core_info->sfe_top);
		if (rc) {
		CAM_ERR(CAM_SFE, "SFE top init failed rc: %d", rc);
		return rc;
		goto deinit_controller;
		}

		rc = cam_sfe_bus_init(sfe_hw_info->bus_wr_version, BUS_TYPE_SFE_WR,
		soc_info, hw_intf, sfe_hw_info->bus_wr_hw_info,
		core_info->sfe_irq_controller,
		&core_info->sfe_bus_wr);
		if (rc) {
		CAM_ERR(CAM_SFE, "SFE bus wr init failed rc: %d", rc);
		@@ -426,13 +437,13 @@ int cam_sfe_core_init(

		rc = cam_sfe_bus_init(sfe_hw_info->bus_rd_version, BUS_TYPE_SFE_RD,
		soc_info, hw_intf, sfe_hw_info->bus_rd_hw_info,
		core_info->sfe_irq_controller,
		&core_info->sfe_bus_rd);
		if (rc) {
		CAM_ERR(CAM_SFE, "SFE bus rd init failed rc: %d", rc);
		goto deinit_bus_wr;
		}

		INIT_LIST_HEAD(&core_info->free_payload_list);
		spin_lock_init(&core_info->spin_lock);
		CAM_DBG(CAM_SFE, "SFE device [%u] INIT success",
		hw_intf->hw_idx);
		@@ -445,6 +456,11 @@ int cam_sfe_core_init(
		deinit_top:
		cam_sfe_top_deinit(sfe_hw_info->top_version,
		&core_info->sfe_top);
		deinit_controller:
		if (cam_irq_controller_deinit(&core_info->sfe_irq_controller))
		CAM_ERR(CAM_SFE,
		"Error cam_irq_controller_deinit failed rc=%d", rc);

		return rc;
		}

		@@ -452,15 +468,11 @@ int cam_sfe_core_deinit(
		struct cam_sfe_hw_core_info *core_info,
		struct cam_sfe_hw_info *sfe_hw_info)
		{
		int rc = -EINVAL, i;
		int rc = -EINVAL;
		unsigned long flags;

		spin_lock_irqsave(&core_info->spin_lock, flags);

		INIT_LIST_HEAD(&core_info->free_payload_list);
		for (i = 0; i < CAM_SFE_EVT_MAX; i++)
		INIT_LIST_HEAD(&core_info->evt_payload[i].list);

		rc = cam_sfe_bus_deinit(BUS_TYPE_SFE_RD,
		sfe_hw_info->bus_rd_version,
		&core_info->sfe_bus_rd);
		@@ -481,6 +493,11 @@ int cam_sfe_core_deinit(
		CAM_ERR(CAM_SFE,
		"SFE top deinit failed rc: %d", rc);

		rc = cam_irq_controller_deinit(&core_info->sfe_irq_controller);
		if (rc)
		CAM_ERR(CAM_SFE,
		"Error cam_irq_controller_deinit failed rc=%d", rc);

		spin_unlock_irqrestore(&core_info->spin_lock, flags);
		return rc;
		}

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/cam_sfe_core.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -34,8 +34,6 @@ struct cam_sfe_hw_core_info {
		struct cam_sfe_bus *sfe_bus_rd;
		void *sfe_irq_controller;
		void *tasklet_info;
		struct cam_sfe_irq_evt_payload evt_payload[CAM_SFE_EVT_MAX];
		struct list_head free_payload_list;
		spinlock_t spin_lock;
		};

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/sfe_bus/cam_sfe_bus.c

+3 −2

Original line number	Diff line number	Diff line
		@@ -14,6 +14,7 @@ int cam_sfe_bus_init(
		struct cam_hw_soc_info *soc_info,
		struct cam_hw_intf *hw_intf,
		void *bus_hw_info,
		void *sfe_irq_controller,
		struct cam_sfe_bus **sfe_bus)
		{
		int rc = -ENODEV;
		@@ -23,7 +24,7 @@ int cam_sfe_bus_init(
		switch (bus_version) {
		case CAM_SFE_BUS_WR_VER_1_0:
		rc = cam_sfe_bus_wr_init(soc_info, hw_intf,
		bus_hw_info, sfe_bus);
		bus_hw_info, sfe_irq_controller, sfe_bus);
		break;
		default:
		CAM_ERR(CAM_SFE, "Unsupported Bus WR Version 0x%x",
		@@ -35,7 +36,7 @@ int cam_sfe_bus_init(
		switch (bus_version) {
		case CAM_SFE_BUS_RD_VER_1_0:
		rc = cam_sfe_bus_rd_init(soc_info, hw_intf,
		bus_hw_info, sfe_bus);
		bus_hw_info, sfe_irq_controller, sfe_bus);
		break;
		default:
		CAM_ERR(CAM_SFE, "Unsupported Bus RD Version 0x%x",