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Commit a798f2f0 authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Krzysztof Kozlowski
Browse files

ARM: dts: exynos: Move audio clocks configuration to odroidxu3-audio.dtsi 



Audio subsystem clocks configuration is a part of audio block,
so there it should be moved to exynos5422-odroidxu3-audio.dtsi
to avoid it on Odroid XU4, which has no audio codec.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 3bf689f9

arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi

+13 −0
Original line number Original line Diff line number Diff line
@@ -11,6 +11,8 @@ 
 * published by the Free Software Foundation.

 * published by the Free Software Foundation.

*/

*/





#include <dt-bindings/sound/samsung-i2s.h>



/ {

/ {

	sound: sound {

	sound: sound {

		compatible = "simple-audio-card";

		compatible = "simple-audio-card";
@@ -43,6 +45,17 @@ 
	};

	};

};

};





&clock_audss {

	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,

			<&clock_audss EXYNOS_MOUT_I2S>,

			<&clock_audss EXYNOS_DOUT_AUD_BUS>;

	assigned-clock-parents = <&clock CLK_FIN_PLL>,

			<&clock_audss EXYNOS_MOUT_AUDSS>;

	assigned-clock-rates = <0>,

			<0>,

			<19200000>;

};



&hsi2c_5 {

&hsi2c_5 {

	status = "okay";

	status = "okay";

	max98090: max98090@10 {

	max98090: max98090@10 {

arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi

+0 −12
Original line number Original line Diff line number Diff line
@@ -16,7 +16,6 @@ 
#include <dt-bindings/input/input.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/sound/samsung-i2s.h>

#include "exynos5800.dtsi"

#include "exynos5800.dtsi"

#include "exynos5422-cpus.dtsi"

#include "exynos5422-cpus.dtsi"
@@ -455,17 +454,6 @@ 
	status = "okay";

	status = "okay";

};

};





&clock_audss {

	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,

			<&clock_audss EXYNOS_MOUT_I2S>,

			<&clock_audss EXYNOS_DOUT_AUD_BUS>;

	assigned-clock-parents = <&clock CLK_FIN_PLL>,

			<&clock_audss EXYNOS_MOUT_AUDSS>;

	assigned-clock-rates = <0>,

			<0>,

			<19200000>;

};



&cpu0 {

&cpu0 {

	cpu-supply = <&buck6_reg>;

	cpu-supply = <&buck6_reg>;

};

};